Patch "gpio: davinci: Do not clear the bank intr enable bit in save_context" has been added to the 6.2-stable tree

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This is a note to let you know that I've just added the patch titled

    gpio: davinci: Do not clear the bank intr enable bit in save_context

to the 6.2-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     gpio-davinci-do-not-clear-the-bank-intr-enable-bit-i.patch
and it can be found in the queue-6.2 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 3bbf1fe368ca5db2b9848447fbd9d91ffc08cf61
Author: Dhruva Gole <d-gole@xxxxxx>
Date:   Mon Apr 3 12:54:42 2023 +0530

    gpio: davinci: Do not clear the bank intr enable bit in save_context
    
    [ Upstream commit fe092498cb9638418c96675be320c74a16306b48 ]
    
    The interrupt enable bits might be set if we want to use the GPIO as
    wakeup source. Clearing this will mean disabling of interrupts in the GPIO
    banks that we may want to wakeup from.
    Thus remove the line that was clearing this bit from the driver's save
    context function.
    
    Cc: Devarsh Thakkar <devarsht@xxxxxx>
    Fixes: 0651a730924b ("gpio: davinci: Add support for system suspend/resume PM")
    Signed-off-by: Dhruva Gole <d-gole@xxxxxx>
    Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
    Acked-by: Keerthy <j-keerthy@xxxxxx>
    Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index fa51a91afa54f..39b00855499b2 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -642,9 +642,6 @@ static void davinci_gpio_save_context(struct davinci_gpio_controller *chips,
 		context->set_falling = readl_relaxed(&g->set_falling);
 	}
 
-	/* Clear Bank interrupt enable bit */
-	writel_relaxed(0, base + BINTEN);
-
 	/* Clear all interrupt status registers */
 	writel_relaxed(GENMASK(31, 0), &g->intstat);
 }



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