Patch "drm/i915/huc: Cancel HuC delayed load timer on reset." has been added to the 6.2-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/i915/huc: Cancel HuC delayed load timer on reset.

to the 6.2-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-i915-huc-cancel-huc-delayed-load-timer-on-reset.patch
and it can be found in the queue-6.2 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit ff1d8156b09e7b561136c992a39ccc82e39d5613
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
Date:   Mon Mar 13 13:55:56 2023 -0700

    drm/i915/huc: Cancel HuC delayed load timer on reset.
    
    [ Upstream commit c74237496fbc799257b091179dd01a3200f7314d ]
    
    In the rare case where we do a full GT reset after starting the HuC
    load and before it completes (which basically boils down to i915 hanging
    during init), we need to cancel the delayed load fence, as it will be
    re-initialized in the post-reset recovery.
    
    Fixes: 27536e03271d ("drm/i915/huc: track delayed HuC load with a fence")
    Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
    Cc: Alan Previn <alan.previn.teres.alexis@xxxxxxxxx>
    Reviewed-by: Alan Previn <alan.previn.teres.alexis@xxxxxxxxx>
    Link: https://patchwork.freedesktop.org/patch/msgid/20230313205556.1174503-1-daniele.ceraolospurio@xxxxxxxxx
    (cherry picked from commit cdf7911f7dbcb37228409a63bf75630776c45a15)
    Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index 410905da8e974..0c103ca160d10 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -235,6 +235,13 @@ static void delayed_huc_load_fini(struct intel_huc *huc)
 	i915_sw_fence_fini(&huc->delayed_load.fence);
 }
 
+int intel_huc_sanitize(struct intel_huc *huc)
+{
+	delayed_huc_load_complete(huc);
+	intel_uc_fw_sanitize(&huc->fw);
+	return 0;
+}
+
 static bool vcs_supported(struct intel_gt *gt)
 {
 	intel_engine_mask_t mask = gt->info.engine_mask;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
index 52db03620c609..db555b3c1f562 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
@@ -41,6 +41,7 @@ struct intel_huc {
 	} delayed_load;
 };
 
+int intel_huc_sanitize(struct intel_huc *huc);
 void intel_huc_init_early(struct intel_huc *huc);
 int intel_huc_init(struct intel_huc *huc);
 void intel_huc_fini(struct intel_huc *huc);
@@ -54,12 +55,6 @@ bool intel_huc_is_authenticated(struct intel_huc *huc);
 void intel_huc_register_gsc_notifier(struct intel_huc *huc, struct bus_type *bus);
 void intel_huc_unregister_gsc_notifier(struct intel_huc *huc, struct bus_type *bus);
 
-static inline int intel_huc_sanitize(struct intel_huc *huc)
-{
-	intel_uc_fw_sanitize(&huc->fw);
-	return 0;
-}
-
 static inline bool intel_huc_is_supported(struct intel_huc *huc)
 {
 	return intel_uc_fw_is_supported(&huc->fw);



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