This is a note to let you know that I've just added the patch titled
KVM: arm64: PMU: Don't save PMCR_EL0.{C,P} for the vCPU
to the 6.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
kvm-arm64-pmu-don-t-save-pmcr_el0.-c-p-for-the-vcpu.patch
and it can be found in the queue-6.2 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From f6da81f650fa47b61b847488f3938d43f90d093d Mon Sep 17 00:00:00 2001
From: Reiji Watanabe <reijiw@xxxxxxxxxx>
Date: Sun, 12 Mar 2023 20:32:34 -0700
Subject: KVM: arm64: PMU: Don't save PMCR_EL0.{C,P} for the vCPU
From: Reiji Watanabe <reijiw@xxxxxxxxxx>
commit f6da81f650fa47b61b847488f3938d43f90d093d upstream.
Presently, when a guest writes 1 to PMCR_EL0.{C,P}, which is WO/RAZ,
KVM saves the register value, including these bits.
When userspace reads the register using KVM_GET_ONE_REG, KVM returns
the saved register value as it is (the saved value might have these
bits set). This could result in userspace setting these bits on the
destination during migration. Consequently, KVM may end up resetting
the vPMU counter registers (PMCCNTR_EL0 and/or PMEVCNTR<n>_EL0) to
zero on the first KVM_RUN after migration.
Fix this by not saving those bits when a guest writes 1 to those bits.
Fixes: ab9468340d2b ("arm64: KVM: Add access handler for PMCR register")
Cc: stable@xxxxxxxxxxxxxxx
Reviewed-by: Marc Zyngier <maz@xxxxxxxxxx>
Signed-off-by: Reiji Watanabe <reijiw@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20230313033234.1475987-1-reijiw@xxxxxxxxxx
Signed-off-by: Oliver Upton <oliver.upton@xxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm64/kvm/pmu-emul.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/arm64/kvm/pmu-emul.c
+++ b/arch/arm64/kvm/pmu-emul.c
@@ -538,7 +538,8 @@ void kvm_pmu_handle_pmcr(struct kvm_vcpu
if (!kvm_pmu_is_3p5(vcpu))
val &= ~ARMV8_PMU_PMCR_LP;
- __vcpu_sys_reg(vcpu, PMCR_EL0) = val;
+ /* The reset bits don't indicate any state, and shouldn't be saved. */
+ __vcpu_sys_reg(vcpu, PMCR_EL0) = val & ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P);
if (val & ARMV8_PMU_PMCR_E) {
kvm_pmu_enable_counter_mask(vcpu,
Patches currently in stable-queue which might be from reijiw@xxxxxxxxxx are
queue-6.2/kvm-arm64-pmu-fix-get_one_reg-for-vpmc-regs-to-return-the-current-value.patch
queue-6.2/kvm-arm64-pmu-don-t-save-pmcr_el0.-c-p-for-the-vcpu.patch
