Patch "drm/amd/display: Remove OTG DIV register write for Virtual signals." has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/amd/display: Remove OTG DIV register write for Virtual signals.

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amd-display-remove-otg-div-register-write-for-vi.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 83deb9b610b14ab419e7f10573a0a022c6d20d7d
Author: Saaem Rizvi <SyedSaaem.Rizvi@xxxxxxx>
Date:   Mon Feb 27 18:55:07 2023 -0500

    drm/amd/display: Remove OTG DIV register write for Virtual signals.
    
    [ Upstream commit 709671ffb15dcd1b4f6afe2a9d8c67c7c4ead4a1 ]
    
    [WHY]
    Hot plugging and then hot unplugging leads to k1 and k2 values to
    change, as signal is detected as a virtual signal on hot unplug. Writing
    these values to OTG_PIXEL_RATE_DIV register might cause primary display
    to blank (known hw bug).
    
    [HOW]
    No longer write k1 and k2 values to register if signal is virtual, we
    have safe guards in place in the case that k1 and k2 is unassigned so
    that an unknown value is not written to the register either.
    
    Cc: stable@xxxxxxxxxxxxxxx
    Cc: Mario Limonciello <mario.limonciello@xxxxxxx>
    Reviewed-by: Samson Tam <Samson.Tam@xxxxxxx>
    Reviewed-by: Alvin Lee <Alvin.Lee2@xxxxxxx>
    Acked-by: Qingqing Zhuo <qingqing.zhuo@xxxxxxx>
    Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@xxxxxxx>
    Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
    Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
index f108e82e70c8b..1a85509c12f23 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
@@ -1180,7 +1180,7 @@ unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsign
 			*k2_div = PIXEL_RATE_DIV_BY_2;
 		else
 			*k2_div = PIXEL_RATE_DIV_BY_4;
-	} else if (dc_is_dp_signal(stream->signal) || dc_is_virtual_signal(stream->signal)) {
+	} else if (dc_is_dp_signal(stream->signal)) {
 		if (two_pix_per_container) {
 			*k1_div = PIXEL_RATE_DIV_BY_1;
 			*k2_div = PIXEL_RATE_DIV_BY_2;



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