Patch "drm/i915/hwmon: Enable PL1 power limit" has been added to the 6.2-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/i915/hwmon: Enable PL1 power limit

to the 6.2-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-i915-hwmon-enable-pl1-power-limit.patch
and it can be found in the queue-6.2 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit bb3f89a6c3e607a5ea71fb4754e11177585bf56e
Author: Ashutosh Dixit <ashutosh.dixit@xxxxxxxxx>
Date:   Fri Feb 3 07:53:09 2023 -0800

    drm/i915/hwmon: Enable PL1 power limit
    
    [ Upstream commit ee892ea83d99610fa33bea612de058e0955eec3a ]
    
    Previous documentation suggested that PL1 power limit is always
    enabled. However we now find this not to be the case on some
    platforms (such as ATSM). Therefore enable PL1 power limit during hwmon
    initialization.
    
    Bspec: 51864
    
    v2: Add Bspec reference (Gwan-gyeong)
    v3: Add Fixes tag
    
    Fixes: 99f55efb79114 ("drm/i915/hwmon: Power PL1 limit and TDP setting")
    Signed-off-by: Ashutosh Dixit <ashutosh.dixit@xxxxxxxxx>
    Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@xxxxxxxxx>
    Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
    Link: https://patchwork.freedesktop.org/patch/msgid/20230203155309.1042297-1-ashutosh.dixit@xxxxxxxxx
    (cherry picked from commit 0349c41b05968befaffa5fbb7e73d0ee6004f610)
    Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c
index c588a17f97e98..6ef7af7c17460 100644
--- a/drivers/gpu/drm/i915/i915_hwmon.c
+++ b/drivers/gpu/drm/i915/i915_hwmon.c
@@ -656,6 +656,11 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)
 		for_each_gt(gt, i915, i)
 			hwm_energy(&hwmon->ddat_gt[i], &energy);
 	}
+
+	/* Enable PL1 power limit */
+	if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
+		hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
+						    PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
 }
 
 void i915_hwmon_register(struct drm_i915_private *i915)



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