This is a note to let you know that I've just added the patch titled
x86/cpu: Fix LFENCE serialization check in init_amd()
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
x86-cpu-fix-lfence-serialization-check-in-init_amd.patch
and it can be found in the queue-4.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From rhythm.m.mahajan@xxxxxxxxxx Wed Mar 15 12:38:00 2023
From: Rhythm Mahajan <rhythm.m.mahajan@xxxxxxxxxx>
Date: Wed, 15 Mar 2023 03:40:15 -0700
Subject: x86/cpu: Fix LFENCE serialization check in init_amd()
To: tglx@xxxxxxxxxxxxx
Cc: rhythm.m.mahajan@xxxxxxxxxx, mingo@xxxxxxxxxx, hpa@xxxxxxxxx, bp@xxxxxxx, gregkh@xxxxxxxxxxxxxxxxxxx, pawan.kumar.gupta@xxxxxxxxxxxxxxx, cascardo@xxxxxxxxxxxxx, surajjs@xxxxxxxxxx, daniel.sneddon@xxxxxxxxxxxxxxx, peterz@xxxxxxxxxxxxx, stable@xxxxxxxxxxxxxxx
Message-ID: <20230315104015.3607718-1-rhythm.m.mahajan@xxxxxxxxxx>
From: Rhythm Mahajan <rhythm.m.mahajan@xxxxxxxxxx>
The commit: 3f235279828c ("x86/cpu: Restore AMD's DE_CFG MSR after resume")
which was backported from the upstream commit: 2632daebafd0 renamed the
MSR_F10H_DECFG_LFENCE_SERIALIZE macro to MSR_AMD64_DE_CFG_LFENCE_SERIALIZE.
The fix for 4.14 and 4.9 changed MSR_F10H_DECFG_LFENCE_SERIALIZE to
MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT in the init_amd() function, but should
have used MSR_AMD64_DE_CFG_LFENCE_SERIALIZE. This causes a discrepency in the
LFENCE serialization check in the init_amd() function.
This causes a ~16% sysbench memory regression, when running:
sysbench --test=memory run
Fixes: 3f235279828c ("x86/cpu: Restore AMD's DE_CFG MSR after resume")
Signed-off-by: Rhythm Mahajan <rhythm.m.mahajan@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/x86/kernel/cpu/amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -950,7 +950,7 @@ static void init_amd(struct cpuinfo_x86
* serializing.
*/
ret = rdmsrl_safe(MSR_AMD64_DE_CFG, &val);
- if (!ret && (val & MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT)) {
+ if (!ret && (val & MSR_AMD64_DE_CFG_LFENCE_SERIALIZE)) {
/* A serializing LFENCE stops RDTSC speculation */
set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
} else {
Patches currently in stable-queue which might be from rhythm.m.mahajan@xxxxxxxxxx are
queue-4.14/x86-cpu-fix-lfence-serialization-check-in-init_amd.patch
