Patch "pwm: stm32-lp: fix the check on arr and cmp registers update" has been added to the 6.2-stable tree

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This is a note to let you know that I've just added the patch titled

    pwm: stm32-lp: fix the check on arr and cmp registers update

to the 6.2-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     pwm-stm32-lp-fix-the-check-on-arr-and-cmp-registers-.patch
and it can be found in the queue-6.2 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 359f1927f742e9d01debecb236935d87c5376979
Author: Fabrice Gasnier <fabrice.gasnier@xxxxxxxxxxx>
Date:   Wed Nov 23 14:36:52 2022 +0100

    pwm: stm32-lp: fix the check on arr and cmp registers update
    
    [ Upstream commit 3066bc2d58be31275afb51a589668f265e419c37 ]
    
    The ARR (auto reload register) and CMP (compare) registers are
    successively written. The status bits to check the update of these
    registers are polled together with regmap_read_poll_timeout().
    The condition to end the loop may become true, even if one of the
    register isn't correctly updated.
    So ensure both status bits are set before clearing them.
    
    Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver")
    Signed-off-by: Fabrice Gasnier <fabrice.gasnier@xxxxxxxxxxx>
    Acked-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>
    Signed-off-by: Thierry Reding <thierry.reding@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index 514ff58a4471d..f315fa106be87 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -127,7 +127,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
 
 	/* ensure CMP & ARR registers are properly written */
 	ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val,
-				       (val & STM32_LPTIM_CMPOK_ARROK),
+				       (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK,
 				       100, 1000);
 	if (ret) {
 		dev_err(priv->chip.dev, "ARR/CMP registers write issue\n");



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