Patch "LoongArch, bpf: Use 4 instructions for function address in JIT" has been added to the 6.2-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    LoongArch, bpf: Use 4 instructions for function address in JIT

to the 6.2-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     loongarch-bpf-use-4-instructions-for-function-addres.patch
and it can be found in the queue-6.2 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 566b6a0c03b0d725233c305f31e9aa9157519904
Author: Hengqi Chen <hengqi.chen@xxxxxxxxx>
Date:   Tue Feb 14 15:26:33 2023 +0000

    LoongArch, bpf: Use 4 instructions for function address in JIT
    
    [ Upstream commit 64f50f6575721ef03d001e907455cbe3baa2a5b1 ]
    
    This patch fixes the following issue of function calls in JIT, like:
    
      [   29.346981] multi-func JIT bug 105 != 103
    
    The issus can be reproduced by running the "inline simple bpf_loop call"
    verifier test.
    
    This is because we are emiting 2-4 instructions for 64-bit immediate moves.
    During the first pass of JIT, the placeholder address is zero, emiting two
    instructions for it. In the extra pass, the function address is in XKVRANGE,
    emiting four instructions for it. This change the instruction index in
    JIT context. Let's always use 4 instructions for function address in JIT.
    So that the instruction sequences don't change between the first pass and
    the extra pass for function calls.
    
    Fixes: 5dc615520c4d ("LoongArch: Add BPF JIT support")
    Signed-off-by: Hengqi Chen <hengqi.chen@xxxxxxxxx>
    Signed-off-by: Daniel Borkmann <daniel@xxxxxxxxxxxxx>
    Tested-by: Tiezhu Yang <yangtiezhu@xxxxxxxxxxx>
    Link: https://lore.kernel.org/bpf/20230214152633.2265699-1-hengqi.chen@xxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c
index c4b1947ebf768..288003a9f0cae 100644
--- a/arch/loongarch/net/bpf_jit.c
+++ b/arch/loongarch/net/bpf_jit.c
@@ -841,7 +841,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
 		if (ret < 0)
 			return ret;
 
-		move_imm(ctx, t1, func_addr, is32);
+		move_addr(ctx, t1, func_addr);
 		emit_insn(ctx, jirl, t1, LOONGARCH_GPR_RA, 0);
 		move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0);
 		break;
diff --git a/arch/loongarch/net/bpf_jit.h b/arch/loongarch/net/bpf_jit.h
index ca708024fdd3e..c335dc4eed370 100644
--- a/arch/loongarch/net/bpf_jit.h
+++ b/arch/loongarch/net/bpf_jit.h
@@ -82,6 +82,27 @@ static inline void emit_sext_32(struct jit_ctx *ctx, enum loongarch_gpr reg, boo
 	emit_insn(ctx, addiw, reg, reg, 0);
 }
 
+static inline void move_addr(struct jit_ctx *ctx, enum loongarch_gpr rd, u64 addr)
+{
+	u64 imm_11_0, imm_31_12, imm_51_32, imm_63_52;
+
+	/* lu12iw rd, imm_31_12 */
+	imm_31_12 = (addr >> 12) & 0xfffff;
+	emit_insn(ctx, lu12iw, rd, imm_31_12);
+
+	/* ori rd, rd, imm_11_0 */
+	imm_11_0 = addr & 0xfff;
+	emit_insn(ctx, ori, rd, rd, imm_11_0);
+
+	/* lu32id rd, imm_51_32 */
+	imm_51_32 = (addr >> 32) & 0xfffff;
+	emit_insn(ctx, lu32id, rd, imm_51_32);
+
+	/* lu52id rd, rd, imm_63_52 */
+	imm_63_52 = (addr >> 52) & 0xfff;
+	emit_insn(ctx, lu52id, rd, rd, imm_63_52);
+}
+
 static inline void move_imm(struct jit_ctx *ctx, enum loongarch_gpr rd, long imm, bool is32)
 {
 	long imm_11_0, imm_31_12, imm_51_32, imm_63_52, imm_51_0, imm_51_31;