This is a note to let you know that I've just added the patch titled
serial: tegra: add support to use 8 bytes trigger
to the 4.19-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
serial-tegra-add-support-to-use-8-bytes-trigger.patch
and it can be found in the queue-4.19 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit 24b11de6a786dea04b00fa67f43fab73dd0a02d6
Author: Krishna Yarlagadda <kyarlagadda@xxxxxxxxxx>
Date: Wed Sep 4 10:13:03 2019 +0530
serial: tegra: add support to use 8 bytes trigger
[ Upstream commit 7799a3aa81279637031abad19e56e4bbf1481d4e ]
Add support to use 8 bytes trigger for Tegra186 SOC.
Signed-off-by: Shardar Shariff Md <smohammed@xxxxxxxxxx>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@xxxxxxxxxx>
Link: https://lore.kernel.org/r/1567572187-29820-9-git-send-email-kyarlagadda@xxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
Stable-dep-of: 109a951a9f1f ("serial: tegra: Read DMA status before terminating")
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index 55415a12d3cc..6a3c6bf5b964 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -88,6 +88,7 @@ struct tegra_uart_chip_data {
bool support_clk_src_div;
bool fifo_mode_enable_status;
int uart_max_port;
+ int max_dma_burst_bytes;
};
struct tegra_uart_port {
@@ -877,7 +878,12 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup)
* programmed in the DMA registers.
*/
tup->fcr_shadow = UART_FCR_ENABLE_FIFO;
- tup->fcr_shadow |= UART_FCR_R_TRIG_01;
+
+ if (tup->cdata->max_dma_burst_bytes == 8)
+ tup->fcr_shadow |= UART_FCR_R_TRIG_10;
+ else
+ tup->fcr_shadow |= UART_FCR_R_TRIG_01;
+
tup->fcr_shadow |= TEGRA_UART_TX_TRIG_16B;
tegra_uart_write(tup, tup->fcr_shadow, UART_FCR);
@@ -991,7 +997,7 @@ static int tegra_uart_dma_channel_allocate(struct tegra_uart_port *tup,
}
dma_sconfig.src_addr = tup->uport.mapbase;
dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
- dma_sconfig.src_maxburst = 4;
+ dma_sconfig.src_maxburst = tup->cdata->max_dma_burst_bytes;
tup->rx_dma_chan = dma_chan;
tup->rx_dma_buf_virt = dma_buf;
tup->rx_dma_buf_phys = dma_phys;
@@ -1263,6 +1269,7 @@ static struct tegra_uart_chip_data tegra20_uart_chip_data = {
.support_clk_src_div = false,
.fifo_mode_enable_status = false,
.uart_max_port = 5,
+ .max_dma_burst_bytes = 4,
};
static struct tegra_uart_chip_data tegra30_uart_chip_data = {
@@ -1271,6 +1278,7 @@ static struct tegra_uart_chip_data tegra30_uart_chip_data = {
.support_clk_src_div = true,
.fifo_mode_enable_status = false,
.uart_max_port = 5,
+ .max_dma_burst_bytes = 4,
};
static struct tegra_uart_chip_data tegra186_uart_chip_data = {
@@ -1279,6 +1287,7 @@ static struct tegra_uart_chip_data tegra186_uart_chip_data = {
.support_clk_src_div = true,
.fifo_mode_enable_status = true,
.uart_max_port = 8,
+ .max_dma_burst_bytes = 8,
};
static const struct of_device_id tegra_uart_of_match[] = {
