Patch "riscv, bpf: Emit fixed-length instructions for BPF_PSEUDO_FUNC" has been added to the 5.15-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    riscv, bpf: Emit fixed-length instructions for BPF_PSEUDO_FUNC

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     riscv-bpf-emit-fixed-length-instructions-for-bpf_pse.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit d266508d8b821d76e1d738a9e505ad4123c2f794
Author: Pu Lehui <pulehui@xxxxxxxxxx>
Date:   Tue Dec 6 17:14:10 2022 +0800

    riscv, bpf: Emit fixed-length instructions for BPF_PSEUDO_FUNC
    
    [ Upstream commit b54b6003612a376e7be32cbc5c1af3754bbbbb3d ]
    
    For BPF_PSEUDO_FUNC instruction, verifier will refill imm with
    correct addresses of bpf_calls and then run last pass of JIT.
    Since the emit_imm of RV64 is variable-length, which will emit
    appropriate length instructions accorroding to the imm, it may
    broke ctx->offset, and lead to unpredictable problem, such as
    inaccurate jump. So let's fix it with fixed-length instructions.
    
    Fixes: 69c087ba6225 ("bpf: Add bpf_for_each_map_elem() helper")
    Suggested-by: Björn Töpel <bjorn@xxxxxxxxxxxx>
    Signed-off-by: Pu Lehui <pulehui@xxxxxxxxxx>
    Signed-off-by: Daniel Borkmann <daniel@xxxxxxxxxxxxx>
    Reviewed-by: Björn Töpel <bjorn@xxxxxxxxxx>
    Acked-by: Björn Töpel <bjorn@xxxxxxxxxx>
    Link: https://lore.kernel.org/bpf/20221206091410.1584784-1-pulehui@xxxxxxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
index 3af4131c22c7..2e3f1a626a3a 100644
--- a/arch/riscv/net/bpf_jit_comp64.c
+++ b/arch/riscv/net/bpf_jit_comp64.c
@@ -120,6 +120,25 @@ static bool in_auipc_jalr_range(s64 val)
 		val < ((1L << 31) - (1L << 11));
 }
 
+/* Emit fixed-length instructions for address */
+static int emit_addr(u8 rd, u64 addr, bool extra_pass, struct rv_jit_context *ctx)
+{
+	u64 ip = (u64)(ctx->insns + ctx->ninsns);
+	s64 off = addr - ip;
+	s64 upper = (off + (1 << 11)) >> 12;
+	s64 lower = off & 0xfff;
+
+	if (extra_pass && !in_auipc_jalr_range(off)) {
+		pr_err("bpf-jit: target offset 0x%llx is out of range\n", off);
+		return -ERANGE;
+	}
+
+	emit(rv_auipc(rd, upper), ctx);
+	emit(rv_addi(rd, rd, lower), ctx);
+	return 0;
+}
+
+/* Emit variable-length instructions for 32-bit and 64-bit imm */
 static void emit_imm(u8 rd, s64 val, struct rv_jit_context *ctx)
 {
 	/* Note that the immediate from the add is sign-extended,
@@ -887,7 +906,15 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
 		u64 imm64;
 
 		imm64 = (u64)insn1.imm << 32 | (u32)imm;
-		emit_imm(rd, imm64, ctx);
+		if (bpf_pseudo_func(insn)) {
+			/* fixed-length insns for extra jit pass */
+			ret = emit_addr(rd, imm64, extra_pass, ctx);
+			if (ret)
+				return ret;
+		} else {
+			emit_imm(rd, imm64, ctx);
+		}
+
 		return 1;
 	}