Patch "RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config()" has been added to the 6.0-stable tree

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This is a note to let you know that I've just added the patch titled

    RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config()

to the 6.0-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     risc-v-kvm-fix-reg_val-check-in-kvm_riscv_vcpu_set_r.patch
and it can be found in the queue-6.0 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit df5ac5424bef988baca627faa6075213eea5c278
Author: Anup Patel <apatel@xxxxxxxxxxxxxxxx>
Date:   Wed Dec 7 09:16:51 2022 +0530

    RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config()
    
    [ Upstream commit e482d9e33d5b0f222cbef7341dcd52cead6b9edc ]
    
    The reg_val check in kvm_riscv_vcpu_set_reg_config() should only
    be done for isa config register.
    
    Fixes: 9bfd900beeec ("RISC-V: KVM: Improve ISA extension by using a bitmap")
    Signed-off-by: Anup Patel <apatel@xxxxxxxxxxxxxxxx>
    Reviewed-by: Andrew Jones <ajones@xxxxxxxxxxxxxxxx>
    Reviewed-by: Atish Patra <atishp@xxxxxxxxxxxx>
    Signed-off-by: Anup Patel <anup@xxxxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index f692c0716aa7..aa7ae6327044 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -286,12 +286,15 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))
 		return -EFAULT;
 
-	/* This ONE REG interface is only defined for single letter extensions */
-	if (fls(reg_val) >= RISCV_ISA_EXT_BASE)
-		return -EINVAL;
-
 	switch (reg_num) {
 	case KVM_REG_RISCV_CONFIG_REG(isa):
+		/*
+		 * This ONE REG interface is only defined for
+		 * single letter extensions.
+		 */
+		if (fls(reg_val) >= RISCV_ISA_EXT_BASE)
+			return -EINVAL;
+
 		if (!vcpu->arch.ran_atleast_once) {
 			/* Ignore the enable/disable request for certain extensions */
 			for (i = 0; i < RISCV_ISA_EXT_BASE; i++) {



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