Patch "PCI: vmd: Fix secondary bus reset for Intel bridges" has been added to the 6.0-stable tree

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This is a note to let you know that I've just added the patch titled

    PCI: vmd: Fix secondary bus reset for Intel bridges

to the 6.0-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     pci-vmd-fix-secondary-bus-reset-for-intel-bridges.patch
and it can be found in the queue-6.0 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit a55ff0c4e7a60692df127d5d1e0d59b55b9a808d
Author: Francisco Munoz <francisco.munoz.ruiz@xxxxxxxxxxxxxxx>
Date:   Mon Dec 5 17:16:37 2022 -0700

    PCI: vmd: Fix secondary bus reset for Intel bridges
    
    [ Upstream commit 0a584655ef89541dae4d48d2c523b1480ae80284 ]
    
    The reset was never applied in the current implementation because Intel
    Bridges owned by VMD are parentless. Internally, pci_reset_bus() applies
    a reset to the parent of the PCI device supplied as argument, but in this
    case it failed because there wasn't a parent.
    
    In more detail, this change allows the VMD driver to enumerate NVMe devices
    in pass-through configurations when guest reboots are performed. There was
    an attempted to fix this, but later we discovered that the code inside
    pci_reset_bus() wasn’t triggering secondary bus resets. Therefore, we
    updated the parameters passed to it, and now NVMe SSDs attached to VMD
    bridges are properly enumerated in VT-d pass-through scenarios.
    
    Link: https://lore.kernel.org/r/20221206001637.4744-1-francisco.munoz.ruiz@xxxxxxxxxxxxxxx
    Fixes: 6aab5622296b ("PCI: vmd: Clean up domain before enumeration")
    Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@xxxxxxxxxxxxxxx>
    Signed-off-by: Lorenzo Pieralisi <lpieralisi@xxxxxxxxxx>
    Reviewed-by: Nirmal Patel <nirmal.patel@xxxxxxxxxxxxxxx>
    Reviewed-by: Jonathan Derrick <jonathan.derrick@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c
index 98e0746e681c..769eedeb8802 100644
--- a/drivers/pci/controller/vmd.c
+++ b/drivers/pci/controller/vmd.c
@@ -719,6 +719,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
 	resource_size_t offset[2] = {0};
 	resource_size_t membar2_offset = 0x2000;
 	struct pci_bus *child;
+	struct pci_dev *dev;
 	int ret;
 
 	/*
@@ -859,8 +860,25 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
 
 	pci_scan_child_bus(vmd->bus);
 	vmd_domain_reset(vmd);
-	list_for_each_entry(child, &vmd->bus->children, node)
-		pci_reset_bus(child->self);
+
+	/* When Intel VMD is enabled, the OS does not discover the Root Ports
+	 * owned by Intel VMD within the MMCFG space. pci_reset_bus() applies
+	 * a reset to the parent of the PCI device supplied as argument. This
+	 * is why we pass a child device, so the reset can be triggered at
+	 * the Intel bridge level and propagated to all the children in the
+	 * hierarchy.
+	 */
+	list_for_each_entry(child, &vmd->bus->children, node) {
+		if (!list_empty(&child->devices)) {
+			dev = list_first_entry(&child->devices,
+					       struct pci_dev, bus_list);
+			if (pci_reset_bus(dev))
+				pci_warn(dev, "can't reset device: %d\n", ret);
+
+			break;
+		}
+	}
+
 	pci_assign_unassigned_bus_resources(vmd->bus);
 
 	/*



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