Patch "PCI: dwc: Fix n_fts[] array overrun" has been added to the 6.0-stable tree

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This is a note to let you know that I've just added the patch titled

    PCI: dwc: Fix n_fts[] array overrun

to the 6.0-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     pci-dwc-fix-n_fts-array-overrun.patch
and it can be found in the queue-6.0 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 02b173b6f2bb6d80ca3fb7361bcdc7957dee1ae0
Author: Vidya Sagar <vidyas@xxxxxxxxxx>
Date:   Mon Sep 26 16:49:23 2022 +0530

    PCI: dwc: Fix n_fts[] array overrun
    
    [ Upstream commit 66110361281b2f7da0c8bd51eaf1f152f4236035 ]
    
    commit aeaa0bfe89654 ("PCI: dwc: Move N_FTS setup to common setup")
    incorrectly uses pci->link_gen in deriving the index to the
    n_fts[] array also introducing the issue of accessing beyond the
    boundaries of array for greater than Gen-2 speeds. This change fixes
    that issue.
    
    Link: https://lore.kernel.org/r/20220926111923.22487-1-vidyas@xxxxxxxxxx
    Fixes: aeaa0bfe8965 ("PCI: dwc: Move N_FTS setup to common setup")
    Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx>
    Signed-off-by: Lorenzo Pieralisi <lpieralisi@xxxxxxxxxx>
    Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
    Acked-by: Jingoo Han <jingoohan1@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index c6725c519a47..9e4d96e5a3f5 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -641,7 +641,7 @@ void dw_pcie_setup(struct dw_pcie *pci)
 	if (pci->n_fts[1]) {
 		val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
 		val &= ~PORT_LOGIC_N_FTS_MASK;
-		val |= pci->n_fts[pci->link_gen - 1];
+		val |= pci->n_fts[1];
 		dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
 	}
 



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