This is a note to let you know that I've just added the patch titled arm64: dts: fsd: fix drive strength macros as per FSD HW UM to the 6.1-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: arm64-dts-fsd-fix-drive-strength-macros-as-per-fsd-h.patch and it can be found in the queue-6.1 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. commit cc8c9cf8c908f33f641157e7846c88c5e5f4bc51 Author: Padmanabhan Rajanbabu <p.rajanbabu@xxxxxxxxxxx> Date: Thu Oct 13 16:10:21 2022 +0530 arm64: dts: fsd: fix drive strength macros as per FSD HW UM [ Upstream commit 574d6c59daefb51729b0640465f007f6c9600358 ] Drive strength macros defined for FSD platform is not reflecting actual names and values as per HW UM. FSD SoC pinctrl has following four levels of drive-strength and their corresponding values: Level-1 <-> 0 Level-2 <-> 1 Level-4 <-> 2 Level-6 <-> 3 The commit 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support") used drive strength macros defined for Exynos4 SoC family. For some IPs the macros values of Exynos4 matched and worked well, but Exynos4 SoC family drive-strength (names and values) is not exactly matching with FSD SoC. Fix the drive strength macros to reflect actual names and values given in FSD HW UM. Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support") Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@xxxxxxxxxxx> Reviewed-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx> Link: https://lore.kernel.org/r/20221013104024.50179-2-p.rajanbabu@xxxxxxxxxxx Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index d0abb9aa0e9e..4e151d419909 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -55,14 +55,14 @@ ufs_rst_n: ufs-rst-n-pins { samsung,pins = "gpf5-0"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_NONE>; - samsung,pin-drv = <FSD_PIN_DRV_LV2>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; ufs_refclk_out: ufs-refclk-out-pins { samsung,pins = "gpf5-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_NONE>; - samsung,pin-drv = <FSD_PIN_DRV_LV2>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; }; @@ -239,14 +239,14 @@ pwm0_out: pwm0-out-pins { samsung,pins = "gpb6-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV2>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; pwm1_out: pwm1-out-pins { samsung,pins = "gpb6-5"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV2>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c0_bus: hs-i2c0-bus-pins { diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h index 6ffbda362493..c397d02208a0 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h @@ -16,9 +16,9 @@ #define FSD_PIN_PULL_UP 3 #define FSD_PIN_DRV_LV1 0 -#define FSD_PIN_DRV_LV2 2 -#define FSD_PIN_DRV_LV3 1 -#define FSD_PIN_DRV_LV4 3 +#define FSD_PIN_DRV_LV2 1 +#define FSD_PIN_DRV_LV4 2 +#define FSD_PIN_DRV_LV6 3 #define FSD_PIN_FUNC_INPUT 0 #define FSD_PIN_FUNC_OUTPUT 1