This is a note to let you know that I've just added the patch titled x86/ioremap: Fix page aligned size calculation in __ioremap_caller() to the 5.10-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: x86-ioremap-fix-page-aligned-size-calculation-in-__ioremap_caller.patch and it can be found in the queue-5.10 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From 4dbd6a3e90e03130973688fd79e19425f720d999 Mon Sep 17 00:00:00 2001 From: Michael Kelley <mikelley@xxxxxxxxxxxxx> Date: Wed, 16 Nov 2022 10:41:24 -0800 Subject: x86/ioremap: Fix page aligned size calculation in __ioremap_caller() From: Michael Kelley <mikelley@xxxxxxxxxxxxx> commit 4dbd6a3e90e03130973688fd79e19425f720d999 upstream. Current code re-calculates the size after aligning the starting and ending physical addresses on a page boundary. But the re-calculation also embeds the masking of high order bits that exceed the size of the physical address space (via PHYSICAL_PAGE_MASK). If the masking removes any high order bits, the size calculation results in a huge value that is likely to immediately fail. Fix this by re-calculating the page-aligned size first. Then mask any high order bits using PHYSICAL_PAGE_MASK. Fixes: ffa71f33a820 ("x86, ioremap: Fix incorrect physical address handling in PAE mode") Signed-off-by: Michael Kelley <mikelley@xxxxxxxxxxxxx> Signed-off-by: Borislav Petkov <bp@xxxxxxx> Acked-by: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx> Cc: <stable@xxxxxxxxxx> Link: https://lore.kernel.org/r/1668624097-14884-2-git-send-email-mikelley@xxxxxxxxxxxxx Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/x86/mm/ioremap.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -216,9 +216,15 @@ __ioremap_caller(resource_size_t phys_ad * Mappings have to be page-aligned */ offset = phys_addr & ~PAGE_MASK; - phys_addr &= PHYSICAL_PAGE_MASK; + phys_addr &= PAGE_MASK; size = PAGE_ALIGN(last_addr+1) - phys_addr; + /* + * Mask out any bits not part of the actual physical + * address, like memory encryption bits. + */ + phys_addr &= PHYSICAL_PAGE_MASK; + retval = memtype_reserve(phys_addr, (u64)phys_addr + size, pcm, &new_pcm); if (retval) { Patches currently in stable-queue which might be from mikelley@xxxxxxxxxxxxx are queue-5.10/drivers-hv-vmbus-fix-possible-memory-leak-in-vmbus_d.patch queue-5.10/drivers-hv-vmbus-fix-double-free-in-the-error-path-o.patch queue-5.10/scsi-storvsc-fix-handling-of-srb_status-and-capacity.patch queue-5.10/x86-ioremap-fix-page-aligned-size-calculation-in-__ioremap_caller.patch