This is a note to let you know that I've just added the patch titled
x86/cpu/amd: Enumerate BTC_NO
to the 4.19-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
x86-cpu-amd-enumerate-btc_no.patch
and it can be found in the queue-4.19 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From stable-owner@xxxxxxxxxxxxxxx Thu Nov 17 10:22:38 2022
From: Suleiman Souhlal <suleiman@xxxxxxxxxx>
Date: Thu, 17 Nov 2022 18:19:47 +0900
Subject: x86/cpu/amd: Enumerate BTC_NO
To: stable@xxxxxxxxxxxxxxx
Cc: x86@xxxxxxxxxx, kvm@xxxxxxxxxxxxxxx, bp@xxxxxxxxx, pbonzini@xxxxxxxxxx, peterz@xxxxxxxxxxxxx, jpoimboe@xxxxxxxxxx, cascardo@xxxxxxxxxxxxx, surajjs@xxxxxxxxxx, ssouhlal@xxxxxxxxxxx, suleiman@xxxxxxxxxx
Message-ID: <20221117091952.1940850-30-suleiman@xxxxxxxxxx>
From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
commit 26aae8ccbc1972233afd08fb3f368947c0314265 upstream.
BTC_NO indicates that hardware is not susceptible to Branch Type Confusion.
Zen3 CPUs don't suffer BTC.
Hypervisors are expected to synthesise BTC_NO when it is appropriate
given the migration pool, to prevent kernels using heuristics.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@xxxxxxxxxxxxx>
[ bp: Adjust context ]
Signed-off-by: Suraj Jitindar Singh <surajjs@xxxxxxxxxx>
Signed-off-by: Suleiman Souhlal <suleiman@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/cpu/amd.c | 21 +++++++++++++++------
arch/x86/kernel/cpu/common.c | 6 ++++--
3 files changed, 20 insertions(+), 8 deletions(-)
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -303,6 +303,7 @@
#define X86_FEATURE_AMD_SSBD (13*32+24) /* "" Speculative Store Bypass Disable */
#define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */
#define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */
+#define X86_FEATURE_BTC_NO (13*32+29) /* "" Not vulnerable to Branch Type Confusion */
/* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */
#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -885,12 +885,21 @@ static void init_amd_zn(struct cpuinfo_x
{
set_cpu_cap(c, X86_FEATURE_ZEN);
- /*
- * Fix erratum 1076: CPB feature bit not being set in CPUID.
- * Always set it, except when running under a hypervisor.
- */
- if (!cpu_has(c, X86_FEATURE_HYPERVISOR) && !cpu_has(c, X86_FEATURE_CPB))
- set_cpu_cap(c, X86_FEATURE_CPB);
+ /* Fix up CPUID bits, but only if not virtualised. */
+ if (!cpu_has(c, X86_FEATURE_HYPERVISOR)) {
+
+ /* Erratum 1076: CPB feature bit not being set in CPUID. */
+ if (!cpu_has(c, X86_FEATURE_CPB))
+ set_cpu_cap(c, X86_FEATURE_CPB);
+
+ /*
+ * Zen3 (Fam19 model < 0x10) parts are not susceptible to
+ * Branch Type Confusion, but predate the allocation of the
+ * BTC_NO bit.
+ */
+ if (c->x86 == 0x19 && !cpu_has(c, X86_FEATURE_BTC_NO))
+ set_cpu_cap(c, X86_FEATURE_BTC_NO);
+ }
}
static void init_amd(struct cpuinfo_x86 *c)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1172,8 +1172,10 @@ static void __init cpu_set_bug_bits(stru
setup_force_cpu_bug(X86_BUG_MMIO_UNKNOWN);
}
- if ((cpu_matches(cpu_vuln_blacklist, RETBLEED) || (ia32_cap & ARCH_CAP_RSBA)))
- setup_force_cpu_bug(X86_BUG_RETBLEED);
+ if (!cpu_has(c, X86_FEATURE_BTC_NO)) {
+ if (cpu_matches(cpu_vuln_blacklist, RETBLEED) || (ia32_cap & ARCH_CAP_RSBA))
+ setup_force_cpu_bug(X86_BUG_RETBLEED);
+ }
if (cpu_matches(cpu_vuln_whitelist, NO_MELTDOWN))
return;
Patches currently in stable-queue which might be from stable-owner@xxxxxxxxxxxxxxx are
queue-4.19/x86-speculation-disable-rrsba-behavior.patch
queue-4.19/revert-x86-speculation-add-rsb-vm-exit-protections.patch
queue-4.19/kvm-vmx-fix-ibrs-handling-after-vmexit.patch
queue-4.19/kvm-vmx-prevent-guest-rsb-poisoning-attacks-with-eibrs.patch
queue-4.19/x86-cpufeature-add-facility-to-check-for-min-microcode-revisions.patch
queue-4.19/x86-bugs-keep-a-per-cpu-ia32_spec_ctrl-value.patch
queue-4.19/x86-cpu-amd-enumerate-btc_no.patch
queue-4.19/x86-speculation-fix-firmware-entry-spec_ctrl-handling.patch
queue-4.19/x86-speculation-add-spectre_v2-ibrs-option-to-support-kernel-ibrs.patch
queue-4.19/x86-cpu-add-consistent-cpu-match-macros.patch
queue-4.19/x86-speculation-remove-x86_spec_ctrl_mask.patch
queue-4.19/x86-bugs-add-cannon-lake-to-retbleed-affected-cpu-list.patch
queue-4.19/x86-bugs-warn-when-ibrs-mitigation-is-selected-on-enhanced-ibrs-parts.patch
queue-4.19/x86-speculation-fill-rsb-on-vmexit-for-ibrs.patch
queue-4.19/x86-cpu-add-a-steppings-field-to-struct-x86_cpu_id.patch
queue-4.19/x86-common-stamp-out-the-stepping-madness.patch
queue-4.19/x86-bugs-split-spectre_v2_select_mitigation-and-spectre_v2_user_select_mitigation.patch
queue-4.19/x86-bugs-report-intel-retbleed-vulnerability.patch
queue-4.19/x86-speculation-change-fill_return_buffer-to-work-with-objtool.patch
queue-4.19/x86-cpufeatures-move-retpoline-flags-to-word-11.patch
queue-4.19/x86-speculation-fix-spec_ctrl-write-on-smt-state-change.patch
queue-4.19/x86-bugs-optimize-spec_ctrl-msr-writes.patch
queue-4.19/x86-bugs-report-amd-retbleed-vulnerability.patch
queue-4.19/x86-speculation-fix-rsb-filling-with-config_retpoline-n.patch
queue-4.19/x86-cpufeature-fix-various-quality-problems-in-the-asm-cpu_device_hd.h-header.patch
queue-4.19/intel_idle-disable-ibrs-during-long-idle.patch
queue-4.19/x86-speculation-use-declare_per_cpu-for-x86_spec_ctrl_current.patch
queue-4.19/x86-entry-remove-skip_r11rcx.patch
queue-4.19/x86-speculation-use-cached-host-spec_ctrl-value-for-guest-entry-exit.patch
queue-4.19/x86-devicetable-move-x86-specific-macro-out-of-generic-code.patch
queue-4.19/x86-bugs-add-amd-retbleed-boot-parameter.patch
queue-4.19/x86-entry-add-kernel-ibrs-implementation.patch
queue-4.19/revert-x86-cpu-add-a-steppings-field-to-struct-x86_cpu_id.patch
queue-4.19/x86-speculation-add-rsb-vm-exit-protections.patch
