Patch "x86/cpu: Add several Intel server CPU model numbers" has been added to the 5.15-stable tree

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This is a note to let you know that I've just added the patch titled

    x86/cpu: Add several Intel server CPU model numbers

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     x86-cpu-add-several-intel-server-cpu-model-numbers.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit bfb20a3241e5bdbf6d72c3eda24f364cf66f40ac
Author: Tony Luck <tony.luck@xxxxxxxxx>
Date:   Thu Nov 3 13:33:10 2022 -0700

    x86/cpu: Add several Intel server CPU model numbers
    
    [ Upstream commit 7beade0dd41d42d797ccb7791b134a77fcebf35b ]
    
    These servers are all on the public versions of the roadmap. The model
    numbers for Grand Ridge, Granite Rapids, and Sierra Forest were included
    in the September 2022 edition of the Instruction Set Extensions document.
    
    Signed-off-by: Tony Luck <tony.luck@xxxxxxxxx>
    Signed-off-by: Borislav Petkov <bp@xxxxxxx>
    Acked-by: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20221103203310.5058-1-tony.luck@xxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 27158436f322..13922963431a 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -105,10 +105,15 @@
 
 #define INTEL_FAM6_SAPPHIRERAPIDS_X	0x8F	/* Golden Cove */
 
+#define INTEL_FAM6_EMERALDRAPIDS_X	0xCF
+
+#define INTEL_FAM6_GRANITERAPIDS_X	0xAD
+#define INTEL_FAM6_GRANITERAPIDS_D	0xAE
+
 #define INTEL_FAM6_ALDERLAKE		0x97	/* Golden Cove / Gracemont */
 #define INTEL_FAM6_ALDERLAKE_L		0x9A	/* Golden Cove / Gracemont */
 
-/* "Small Core" Processors (Atom) */
+/* "Small Core" Processors (Atom/E-Core) */
 
 #define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */
 #define INTEL_FAM6_ATOM_BONNELL_MID	0x26 /* Silverthorne, Lincroft */
@@ -135,6 +140,10 @@
 #define INTEL_FAM6_ATOM_TREMONT		0x96 /* Elkhart Lake */
 #define INTEL_FAM6_ATOM_TREMONT_L	0x9C /* Jasper Lake */
 
+#define INTEL_FAM6_SIERRAFOREST_X	0xAF
+
+#define INTEL_FAM6_GRANDRIDGE		0xB6
+
 /* Xeon Phi */
 
 #define INTEL_FAM6_XEON_PHI_KNL		0x57 /* Knights Landing */



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