This is a note to let you know that I've just added the patch titled
spi: intel: Use correct mask for flash and protected regions
to the 6.0-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
spi-intel-use-correct-mask-for-flash-and-protected-regions.patch
and it can be found in the queue-6.0 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 92a66cbf6b30eda5719fbdfb24cd15fb341bba32 Mon Sep 17 00:00:00 2001
From: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
Date: Tue, 25 Oct 2022 09:28:00 +0300
Subject: spi: intel: Use correct mask for flash and protected regions
From: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
commit 92a66cbf6b30eda5719fbdfb24cd15fb341bba32 upstream.
The flash and protected region mask is actually 0x7fff (30:16 and 14:0)
and not 0x3fff so fix this accordingly. While there use GENMASK() instead.
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20221025062800.22357-1-mika.westerberg@xxxxxxxxxxxxxxx
Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/spi/spi-intel.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/spi/spi-intel.c
+++ b/drivers/spi/spi-intel.c
@@ -52,17 +52,17 @@
#define FRACC 0x50
#define FREG(n) (0x54 + ((n) * 4))
-#define FREG_BASE_MASK 0x3fff
+#define FREG_BASE_MASK GENMASK(14, 0)
#define FREG_LIMIT_SHIFT 16
-#define FREG_LIMIT_MASK (0x03fff << FREG_LIMIT_SHIFT)
+#define FREG_LIMIT_MASK GENMASK(30, 16)
/* Offset is from @ispi->pregs */
#define PR(n) ((n) * 4)
#define PR_WPE BIT(31)
#define PR_LIMIT_SHIFT 16
-#define PR_LIMIT_MASK (0x3fff << PR_LIMIT_SHIFT)
+#define PR_LIMIT_MASK GENMASK(30, 16)
#define PR_RPE BIT(15)
-#define PR_BASE_MASK 0x3fff
+#define PR_BASE_MASK GENMASK(14, 0)
/* Offsets are from @ispi->sregs */
#define SSFSTS_CTL 0x00
Patches currently in stable-queue which might be from mika.westerberg@xxxxxxxxxxxxxxx are
queue-6.0/spi-intel-use-correct-mask-for-flash-and-protected-regions.patch
queue-6.0/thunderbolt-add-dp-out-resource-when-dp-tunnel-is-discovered.patch
