Patch "KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS" has been added to the 4.14-stable tree

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This is a note to let you know that I've just added the patch titled

    KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS

to the 4.14-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     kvm-vmx-prevent-guest-rsb-poisoning-attacks-with-eibrs.patch
and it can be found in the queue-4.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From foo@baz Mon Oct 31 07:55:50 AM CET 2022
From: Suraj Jitindar Singh <surajjs@xxxxxxxxxx>
Date: Thu, 27 Oct 2022 13:55:30 -0700
Subject: KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS
To: <stable@xxxxxxxxxxxxxxx>
Cc: <surajjs@xxxxxxxxxx>, <sjitindarsingh@xxxxxxxxx>, <cascardo@xxxxxxxxxxxxx>, <kvm@xxxxxxxxxxxxxxx>, <pbonzini@xxxxxxxxxx>, <jpoimboe@xxxxxxxxxx>, <peterz@xxxxxxxxxxxxx>, <x86@xxxxxxxxxx>
Message-ID: <20221027205533.17873-1-surajjs@xxxxxxxxxx>

From: Josh Poimboeuf <jpoimboe@xxxxxxxxxx>

commit fc02735b14fff8c6678b521d324ade27b1a3d4cf upstream.

On eIBRS systems, the returns in the vmexit return path from
__vmx_vcpu_run() to vmx_vcpu_run() are exposed to RSB poisoning attacks.

Fix that by moving the post-vmexit spec_ctrl handling to immediately
after the vmexit.

Signed-off-by: Josh Poimboeuf <jpoimboe@xxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@xxxxxxxxxxxxx>
[ bp: Adjust for the fact that vmexit is in inline assembly ]
Signed-off-by: Suraj Jitindar Singh <surajjs@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 arch/x86/include/asm/nospec-branch.h |    3 +-
 arch/x86/kernel/cpu/bugs.c           |    4 +++
 arch/x86/kvm/vmx.c                   |   45 ++++++++++++++++++++++++++++++-----
 3 files changed, 45 insertions(+), 7 deletions(-)

--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -257,7 +257,7 @@ extern char __indirect_thunk_end[];
  * retpoline and IBRS mitigations for Spectre v2 need this; only on future
  * CPUs with IBRS_ALL *might* it be avoided.
  */
-static inline void vmexit_fill_RSB(void)
+static __always_inline void vmexit_fill_RSB(void)
 {
 #ifdef CONFIG_RETPOLINE
 	unsigned long loops;
@@ -292,6 +292,7 @@ static inline void indirect_branch_predi
 
 /* The Intel SPEC CTRL MSR base value cache */
 extern u64 x86_spec_ctrl_base;
+extern u64 x86_spec_ctrl_current;
 extern void write_spec_ctrl_current(u64 val, bool force);
 extern u64 spec_ctrl_current(void);
 
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -185,6 +185,10 @@ void __init check_bugs(void)
 #endif
 }
 
+/*
+ * NOTE: For VMX, this function is not called in the vmexit path.
+ * It uses vmx_spec_ctrl_restore_host() instead.
+ */
 void
 x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
 {
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -9770,10 +9770,31 @@ static void vmx_arm_hv_timer(struct kvm_
 	vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, delta_tsc);
 }
 
+u64 __always_inline vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx)
+{
+	u64 guestval, hostval = this_cpu_read(x86_spec_ctrl_current);
+
+	if (!cpu_feature_enabled(X86_FEATURE_MSR_SPEC_CTRL))
+		return 0;
+
+	guestval = __rdmsr(MSR_IA32_SPEC_CTRL);
+
+	/*
+	 * If the guest/host SPEC_CTRL values differ, restore the host value.
+	 */
+	if (guestval != hostval)
+		native_wrmsrl(MSR_IA32_SPEC_CTRL, hostval);
+
+	barrier_nospec();
+
+	return guestval;
+}
+
 static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
 {
 	struct vcpu_vmx *vmx = to_vmx(vcpu);
 	unsigned long debugctlmsr, cr3, cr4;
+	u64 spec_ctrl;
 
 	/* Record the guest's net vcpu time for enforced NMI injections. */
 	if (unlikely(!cpu_has_virtual_nmis() &&
@@ -9967,6 +9988,23 @@ static void __noclone vmx_vcpu_run(struc
 		, "eax", "ebx", "edi", "esi"
 #endif
 	      );
+	/*
+	 * IMPORTANT: RSB filling and SPEC_CTRL handling must be done before
+	 * the first unbalanced RET after vmexit!
+	 *
+	 * For retpoline, RSB filling is needed to prevent poisoned RSB entries
+	 * and (in some cases) RSB underflow.
+	 *
+	 * eIBRS has its own protection against poisoned RSB, so it doesn't
+	 * need the RSB filling sequence.  But it does need to be enabled
+	 * before the first unbalanced RET.
+	 *
+	 * So no RETs before vmx_spec_ctrl_restore_host() below.
+	 */
+	vmexit_fill_RSB();
+
+	/* Save this for below */
+	spec_ctrl = vmx_spec_ctrl_restore_host(vmx);
 
 	vmx_enable_fb_clear(vmx);
 
@@ -9986,12 +10024,7 @@ static void __noclone vmx_vcpu_run(struc
 	 * save it.
 	 */
 	if (unlikely(!msr_write_intercepted(vcpu, MSR_IA32_SPEC_CTRL)))
-		vmx->spec_ctrl = native_read_msr(MSR_IA32_SPEC_CTRL);
-
-	x86_spec_ctrl_restore_host(vmx->spec_ctrl, 0);
-
-	/* Eliminate branch target predictions from guest mode */
-	vmexit_fill_RSB();
+		vmx->spec_ctrl = spec_ctrl;
 
 	/* MSR_IA32_DEBUGCTLMSR is zeroed on vmexit. Restore it if needed */
 	if (debugctlmsr)


Patches currently in stable-queue which might be from surajjs@xxxxxxxxxx are

queue-4.14/x86-speculation-disable-rrsba-behavior.patch
queue-4.14/x86-bugs-report-intel-retbleed-vulnerability.patch
queue-4.14/x86-entry-add-kernel-ibrs-implementation.patch
queue-4.14/x86-bugs-warn-when-ibrs-mitigation-is-selected-on-enhanced-ibrs-parts.patch
queue-4.14/x86-cpu-add-a-steppings-field-to-struct-x86_cpu_id.patch
queue-4.14/x86-speculation-fix-spec_ctrl-write-on-smt-state-change.patch
queue-4.14/entel_idle-disable-ibrs-during-long-idle.patch
queue-4.14/x86-speculation-use-cached-host-spec_ctrl-value-for-guest-entry-exit.patch
queue-4.14/x86-speculation-change-fill_return_buffer-to-work-with-objtool.patch
queue-4.14/x86-speculation-add-lfence-to-rsb-fill-sequence.patch
queue-4.14/x86-bugs-report-amd-retbleed-vulnerability.patch
queue-4.14/x86-speculation-add-spectre_v2-ibrs-option-to-support-kernel-ibrs.patch
queue-4.14/x86-bugs-keep-a-per-cpu-ia32_spec_ctrl-value.patch
queue-4.14/x86-speculation-fill-rsb-on-vmexit-for-ibrs.patch
queue-4.14/x86-speculation-fix-rsb-filling-with-config_retpoline-n.patch
queue-4.14/x86-speculation-add-rsb-vm-exit-protections.patch
queue-4.14/x86-bugs-optimize-spec_ctrl-msr-writes.patch
queue-4.14/kvm-vmx-fix-ibrs-handling-after-vmexit.patch
queue-4.14/kvm-vmx-prevent-guest-rsb-poisoning-attacks-with-eibrs.patch
queue-4.14/x86-speculation-fix-firmware-entry-spec_ctrl-handling.patch
queue-4.14/x86-bugs-add-amd-retbleed-boot-parameter.patch
queue-4.14/x86-cpu-add-consistent-cpu-match-macros.patch
queue-4.14/x86-speculation-remove-x86_spec_ctrl_mask.patch
queue-4.14/x86-speculation-use-declare_per_cpu-for-x86_spec_ctrl_current.patch
queue-4.14/x86-cpufeature-fix-various-quality-problems-in-the-asm-cpu_device_hd.h-header.patch
queue-4.14/x86-entry-remove-skip_r11rcx.patch
queue-4.14/revert-x86-cpu-add-a-steppings-field-to-struct-x86_cpu_id.patch
queue-4.14/x86-common-stamp-out-the-stepping-madness.patch
queue-4.14/x86-cpu-amd-enumerate-btc_no.patch
queue-4.14/x86-bugs-add-cannon-lake-to-retbleed-affected-cpu-list.patch
queue-4.14/x86-devicetable-move-x86-specific-macro-out-of-generic-code.patch
queue-4.14/x86-bugs-split-spectre_v2_select_mitigation-and-spectre_v2_user_select_mitigation.patch
queue-4.14/x86-cpufeatures-move-retpoline-flags-to-word-11.patch
queue-4.14/x86-cpufeature-add-facility-to-check-for-min-microcode-revisions.patch



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