Patch "clk: qcom: clk-rcg2: add rcg2 mux ops" has been added to the 5.15-stable tree

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This is a note to let you know that I've just added the patch titled

    clk: qcom: clk-rcg2: add rcg2 mux ops

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-qcom-clk-rcg2-add-rcg2-mux-ops.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 17f9bdb3638b4bbdcff8366c2afcfb8a22cb2db4
Author: Christian Marangi <ansuelsmth@xxxxxxxxx>
Date:   Fri Aug 19 00:06:20 2022 +0200

    clk: qcom: clk-rcg2: add rcg2 mux ops
    
    [ Upstream commit c5d2c96b3a7bd8987fad9957510034130037fccf ]
    
    An RCG may act as a mux that switch between 2 parents.
    This is the case on IPQ6018 and IPQ8074 where the APCS core clk that feeds
    the CPU cluster clock just switches between XO and the PLL that feeds it.
    
    Add the required ops to add support for this special configuration and use
    the generic mux function to determine the rate.
    
    This way we dont have to keep a essentially dummy frequency table to use
    RCG2 as a mux.
    
    Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
    Signed-off-by: Robert Marko <robimarko@xxxxxxxxx>
    Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20220818220628.339366-1-robimarko@xxxxxxxxx
    Stable-dep-of: 43a56cbf2a38 ("clk: qcom: apss-ipq6018: fix apcs_alias0_clk_src")
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
index 99efcc7f8d88..248115a018bc 100644
--- a/drivers/clk/qcom/clk-rcg.h
+++ b/drivers/clk/qcom/clk-rcg.h
@@ -164,6 +164,7 @@ struct clk_rcg2_gfx3d {
 
 extern const struct clk_ops clk_rcg2_ops;
 extern const struct clk_ops clk_rcg2_floor_ops;
+extern const struct clk_ops clk_rcg2_mux_closest_ops;
 extern const struct clk_ops clk_edp_pixel_ops;
 extern const struct clk_ops clk_byte_ops;
 extern const struct clk_ops clk_byte2_ops;
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index c3823cc32edc..fdbbda1f2ba4 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -477,6 +477,13 @@ const struct clk_ops clk_rcg2_floor_ops = {
 };
 EXPORT_SYMBOL_GPL(clk_rcg2_floor_ops);
 
+const struct clk_ops clk_rcg2_mux_closest_ops = {
+	.determine_rate = __clk_mux_determine_rate_closest,
+	.get_parent = clk_rcg2_get_parent,
+	.set_parent = clk_rcg2_set_parent,
+};
+EXPORT_SYMBOL_GPL(clk_rcg2_mux_closest_ops);
+
 struct frac_entry {
 	int num;
 	int den;



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