Patch "ARM: dts: turris-omnia: Fix mpp26 pin name and comment" has been added to the 6.0-stable tree

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This is a note to let you know that I've just added the patch titled

    ARM: dts: turris-omnia: Fix mpp26 pin name and comment

to the 6.0-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-dts-turris-omnia-fix-mpp26-pin-name-and-comment.patch
and it can be found in the queue-6.0 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit f0e40a30f288662c9c3042d71174dc2cc50d38f3
Author: Marek Behún <kabel@xxxxxxxxxx>
Date:   Wed Jul 27 14:56:10 2022 +0200

    ARM: dts: turris-omnia: Fix mpp26 pin name and comment
    
    [ Upstream commit 49e93898f0dc177e645c22d0664813567fd9ec00 ]
    
    There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
    which is routed to CN11 pin header, is documented as SPI CS1, but
    MPP[26] pin does not support this function. Instead it controls chip
    select 2 if in "spi0" mode.
    
    Fix the name of the pin node in pinctrl node and fix the comment in SPI
    node.
    
    Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
    Signed-off-by: Marek Behún <kabel@xxxxxxxxxx>
    Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts
index d1e0db6e5730..a41902e3815c 100644
--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -476,7 +476,7 @@
 		marvell,function = "spi0";
 	};
 
-	spi0cs1_pins: spi0cs1-pins {
+	spi0cs2_pins: spi0cs2-pins {
 		marvell,pins = "mpp26";
 		marvell,function = "spi0";
 	};
@@ -511,7 +511,7 @@
 		};
 	};
 
-	/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
+	/* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
 };
 
 &uart0 {



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