This is a note to let you know that I've just added the patch titled x86/cpufeatures: Move RETPOLINE flags to word 11 to the 5.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: x86-cpufeatures-move-retpoline-flags-to-word-11.patch and it can be found in the queue-5.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From foo@baz Wed Oct 5 12:28:43 PM CEST 2022 From: Thadeu Lima de Souza Cascardo <cascardo@xxxxxxxxxxxxx> Date: Mon, 3 Oct 2022 10:10:08 -0300 Subject: x86/cpufeatures: Move RETPOLINE flags to word 11 To: stable@xxxxxxxxxxxxxxx Cc: x86@xxxxxxxxxx, kvm@xxxxxxxxxxxxxxx, bp@xxxxxxxxx, pbonzini@xxxxxxxxxx, peterz@xxxxxxxxxxxxx, jpoimboe@xxxxxxxxxx Message-ID: <20221003131038.12645-8-cascardo@xxxxxxxxxxxxx> From: Peter Zijlstra <peterz@xxxxxxxxxxxxx> commit a883d624aed463c84c22596006e5a96f5b44db31 upstream. In order to extend the RETPOLINE features to 4, move them to word 11 where there is still room. This mostly keeps DISABLE_RETPOLINE simple. Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx> Signed-off-by: Borislav Petkov <bp@xxxxxxx> Reviewed-by: Josh Poimboeuf <jpoimboe@xxxxxxxxxx> Signed-off-by: Borislav Petkov <bp@xxxxxxx> Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@xxxxxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/x86/include/asm/cpufeatures.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -203,8 +203,8 @@ #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ #define X86_FEATURE_SME ( 7*32+10) /* AMD Secure Memory Encryption */ #define X86_FEATURE_PTI ( 7*32+11) /* Kernel Page Table Isolation enabled */ -#define X86_FEATURE_RETPOLINE ( 7*32+12) /* "" Generic Retpoline mitigation for Spectre variant 2 */ -#define X86_FEATURE_RETPOLINE_LFENCE ( 7*32+13) /* "" Use LFENCE for Spectre variant 2 */ +/* FREE! ( 7*32+12) */ +/* FREE! ( 7*32+13) */ #define X86_FEATURE_INTEL_PPIN ( 7*32+14) /* Intel Processor Inventory Number */ #define X86_FEATURE_CDP_L2 ( 7*32+15) /* Code and Data Prioritization L2 */ #define X86_FEATURE_MSR_SPEC_CTRL ( 7*32+16) /* "" MSR SPEC_CTRL is implemented */ @@ -286,6 +286,8 @@ #define X86_FEATURE_CQM_MBM_LOCAL (11*32+ 3) /* LLC Local MBM monitoring */ #define X86_FEATURE_FENCE_SWAPGS_USER (11*32+ 4) /* "" LFENCE in user entry SWAPGS path */ #define X86_FEATURE_FENCE_SWAPGS_KERNEL (11*32+ 5) /* "" LFENCE in kernel entry SWAPGS path */ +#define X86_FEATURE_RETPOLINE (11*32+12) /* "" Generic Retpoline mitigation for Spectre variant 2 */ +#define X86_FEATURE_RETPOLINE_LFENCE (11*32+13) /* "" Use LFENCE for Spectre variant 2 */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */ Patches currently in stable-queue which might be from cascardo@xxxxxxxxxxxxx are queue-5.4/x86-speculation-disable-rrsba-behavior.patch queue-5.4/kvm-vmx-flatten-__vmx_vcpu_run.patch queue-5.4/x86-kvm-vmx-make-noinstr-clean.patch queue-5.4/revert-x86-speculation-add-rsb-vm-exit-protections.patch queue-5.4/kvm-vmx-fix-ibrs-handling-after-vmexit.patch queue-5.4/kvm-vmx-prevent-guest-rsb-poisoning-attacks-with-eibrs.patch queue-5.4/kvm-nvmx-use-__vmx_vcpu_run-in-nested_vmx_check_vmentry_hw.patch queue-5.4/x86-bugs-keep-a-per-cpu-ia32_spec_ctrl-value.patch queue-5.4/x86-cpu-amd-enumerate-btc_no.patch queue-5.4/x86-speculation-fix-firmware-entry-spec_ctrl-handling.patch queue-5.4/x86-speculation-add-spectre_v2-ibrs-option-to-support-kernel-ibrs.patch queue-5.4/x86-cpu-add-consistent-cpu-match-macros.patch queue-5.4/x86-speculation-remove-x86_spec_ctrl_mask.patch queue-5.4/x86-bugs-add-cannon-lake-to-retbleed-affected-cpu-list.patch queue-5.4/x86-bugs-warn-when-ibrs-mitigation-is-selected-on-enhanced-ibrs-parts.patch queue-5.4/x86-speculation-fill-rsb-on-vmexit-for-ibrs.patch queue-5.4/x86-cpu-add-a-steppings-field-to-struct-x86_cpu_id.patch queue-5.4/kvm-vmx-convert-launched-argument-to-flags.patch queue-5.4/x86-common-stamp-out-the-stepping-madness.patch queue-5.4/x86-bugs-split-spectre_v2_select_mitigation-and-spectre_v2_user_select_mitigation.patch queue-5.4/x86-bugs-report-intel-retbleed-vulnerability.patch queue-5.4/x86-speculation-change-fill_return_buffer-to-work-with-objtool.patch queue-5.4/x86-cpufeatures-move-retpoline-flags-to-word-11.patch queue-5.4/x86-speculation-fix-spec_ctrl-write-on-smt-state-change.patch queue-5.4/kvm-vmx-use-test-reg-reg-instead-of-cmp-0-reg-in-vmenter.s.patch queue-5.4/x86-bugs-optimize-spec_ctrl-msr-writes.patch queue-5.4/x86-bugs-report-amd-retbleed-vulnerability.patch queue-5.4/x86-speculation-fix-rsb-filling-with-config_retpoline-n.patch queue-5.4/intel_idle-disable-ibrs-during-long-idle.patch queue-5.4/x86-speculation-use-declare_per_cpu-for-x86_spec_ctrl_current.patch queue-5.4/x86-entry-remove-skip_r11rcx.patch queue-5.4/x86-speculation-use-cached-host-spec_ctrl-value-for-guest-entry-exit.patch queue-5.4/x86-devicetable-move-x86-specific-macro-out-of-generic-code.patch queue-5.4/x86-bugs-add-amd-retbleed-boot-parameter.patch queue-5.4/x86-entry-add-kernel-ibrs-implementation.patch queue-5.4/revert-x86-cpu-add-a-steppings-field-to-struct-x86_cpu_id.patch queue-5.4/x86-speculation-add-rsb-vm-exit-protections.patch