This is a note to let you know that I've just added the patch titled
reset: imx7: Fix the iMX8MP PCIe PHY PERST support
to the 5.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
reset-imx7-fix-the-imx8mp-pcie-phy-perst-support.patch
and it can be found in the queue-5.10 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit c5fafc974238fce39973e046a6304de5147dc699
Author: Richard Zhu <hongxing.zhu@xxxxxxx>
Date: Tue Aug 30 15:46:01 2022 +0800
reset: imx7: Fix the iMX8MP PCIe PHY PERST support
[ Upstream commit 051d9eb403887bb11852b7a4f744728a6a4b1b58 ]
On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST bit(BIT3)
of SRC_PCIEPHY_RCR is 1b'1.
But i.MX8MP has one inversed default value 1b'0 of PERST bit.
And the PERST bit should be kept 1b'1 after power and clocks are stable.
So fix the i.MX8MP PCIe PHY PERST support here.
Fixes: e08672c03981 ("reset: imx7: Add support for i.MX8MP SoC")
Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
Reviewed-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
Tested-by: Marek Vasut <marex@xxxxxxx>
Tested-by: Richard Leitner <richard.leitner@xxxxxxxxxxx>
Tested-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
Signed-off-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/1661845564-11373-5-git-send-email-hongxing.zhu@xxxxxxx
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 185a333df66c..d2408725eb2c 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct reset_controller_dev *rcdev,
break;
case IMX8MP_RESET_PCIE_CTRL_APPS_EN:
+ case IMX8MP_RESET_PCIEPHY_PERST:
value = assert ? 0 : bit;
break;
}
