Patch "iavf: Fix cached head and tail value for iavf_get_tx_pending" has been added to the 5.4-stable tree

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This is a note to let you know that I've just added the patch titled

    iavf: Fix cached head and tail value for iavf_get_tx_pending

to the 5.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     iavf-fix-cached-head-and-tail-value-for-iavf_get_tx_.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 81fecbe16ae85a2753726092c369168fd1872044
Author: Brett Creeley <brett.creeley@xxxxxxxxx>
Date:   Thu Sep 1 16:34:40 2022 +0200

    iavf: Fix cached head and tail value for iavf_get_tx_pending
    
    [ Upstream commit 809f23c0423a43266e47a7dc67e95b5cb4d1cbfc ]
    
    The underlying hardware may or may not allow reading of the head or tail
    registers and it really makes no difference if we use the software
    cached values. So, always used the software cached values.
    
    Fixes: 9c6c12595b73 ("i40e: Detection and recovery of TX queue hung logic moved to service_task from tx_timeout")
    Signed-off-by: Brett Creeley <brett.creeley@xxxxxxxxx>
    Co-developed-by: Norbert Zulinski <norbertx.zulinski@xxxxxxxxx>
    Signed-off-by: Norbert Zulinski <norbertx.zulinski@xxxxxxxxx>
    Signed-off-by: Mateusz Palczewski <mateusz.palczewski@xxxxxxxxx>
    Tested-by: Konrad Jankowski <konrad0.jankowski@xxxxxxxxx>
    Signed-off-by: Tony Nguyen <anthony.l.nguyen@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/net/ethernet/intel/iavf/iavf_txrx.c b/drivers/net/ethernet/intel/iavf/iavf_txrx.c
index c6905d1b6182..ce2f6d1ca79f 100644
--- a/drivers/net/ethernet/intel/iavf/iavf_txrx.c
+++ b/drivers/net/ethernet/intel/iavf/iavf_txrx.c
@@ -114,8 +114,11 @@ u32 iavf_get_tx_pending(struct iavf_ring *ring, bool in_sw)
 {
 	u32 head, tail;
 
+	/* underlying hardware might not allow access and/or always return
+	 * 0 for the head/tail registers so just use the cached values
+	 */
 	head = ring->next_to_clean;
-	tail = readl(ring->tail);
+	tail = ring->next_to_use;
 
 	if (head != tail)
 		return (head < tail) ?



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