Patch "iio: addac: ad74413r: Fix alignment for DMA safety" has been added to the 5.18-stable tree

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This is a note to let you know that I've just added the patch titled

    iio: addac: ad74413r: Fix alignment for DMA safety

to the 5.18-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     iio-addac-ad74413r-fix-alignment-for-dma-safety.patch
and it can be found in the queue-5.18 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 57946d40d3373d2ef0b3fa0fde7ec285c0321dbd
Author: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
Date:   Sun May 8 18:56:20 2022 +0100

    iio: addac: ad74413r: Fix alignment for DMA safety
    
    [ Upstream commit 00eb2b8a077062557772234019ecd6045b8b6298 ]
    
    ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1.  Switch to the updated
    IIO_DMA_MINALIGN definition.
    
    Update the comment to include 'may'.
    
    Fixes: fea251b6a5db ("iio: addac: add AD74413R driver")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
    Cc: Cosmin Tanislav <cosmin.tanislav@xxxxxxxxxx>
    Acked-by: Nuno Sá <nuno.sa@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20220508175712.647246-41-jic23@xxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/iio/addac/ad74413r.c b/drivers/iio/addac/ad74413r.c
index acd230a6af35..6a66d7a65db7 100644
--- a/drivers/iio/addac/ad74413r.c
+++ b/drivers/iio/addac/ad74413r.c
@@ -77,13 +77,13 @@ struct ad74413r_state {
 	struct spi_transfer	adc_samples_xfer[AD74413R_CHANNEL_MAX + 1];
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	struct {
 		u8 rx_buf[AD74413R_FRAME_SIZE * AD74413R_CHANNEL_MAX];
 		s64 timestamp;
-	} adc_samples_buf ____cacheline_aligned;
+	} adc_samples_buf __aligned(IIO_DMA_MINALIGN);
 
 	u8	adc_samples_tx_buf[AD74413R_FRAME_SIZE * AD74413R_CHANNEL_MAX];
 	u8	reg_tx_buf[AD74413R_FRAME_SIZE];



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