Patch "iio: adc: ti-ads7950: Fix alignment for DMA safety" has been added to the 5.18-stable tree

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This is a note to let you know that I've just added the patch titled

    iio: adc: ti-ads7950: Fix alignment for DMA safety

to the 5.18-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     iio-adc-ti-ads7950-fix-alignment-for-dma-safety.patch
and it can be found in the queue-5.18 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 7b8496899acc90cdb57120381bf12ee5ddad5181
Author: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
Date:   Sun May 8 18:56:16 2022 +0100

    iio: adc: ti-ads7950: Fix alignment for DMA safety
    
    [ Upstream commit dd54ba8b2469f6ae665c529623a9454ce5293ca8 ]
    
    ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1.  Switch to the updated
    IIO_DMA_MINALIGN definition.
    
    Update the comment to include 'may'.
    
    Fixes: 902c4b2446d4 ("iio: adc: New driver for TI ADS7950 chips")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
    Acked-by: David Lechner <david@xxxxxxxxxxxxxx>
    Acked-by: Nuno Sá <nuno.sa@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20220508175712.647246-37-jic23@xxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/iio/adc/ti-ads7950.c b/drivers/iio/adc/ti-ads7950.c
index e3658b969c5b..2cc9a9bd9db6 100644
--- a/drivers/iio/adc/ti-ads7950.c
+++ b/drivers/iio/adc/ti-ads7950.c
@@ -102,11 +102,11 @@ struct ti_ads7950_state {
 	unsigned int		gpio_cmd_settings_bitmask;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	u16 rx_buf[TI_ADS7950_MAX_CHAN + 2 + TI_ADS7950_TIMESTAMP_SIZE]
-							____cacheline_aligned;
+		__aligned(IIO_DMA_MINALIGN);
 	u16 tx_buf[TI_ADS7950_MAX_CHAN + 2];
 	u16 single_tx;
 	u16 single_rx;



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