Patch "iio: adc: ad7476: Fix alignment for DMA safety" has been added to the 5.18-stable tree

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This is a note to let you know that I've just added the patch titled

    iio: adc: ad7476: Fix alignment for DMA safety

to the 5.18-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     iio-adc-ad7476-fix-alignment-for-dma-safety.patch
and it can be found in the queue-5.18 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 7802a48d9c24c940a7c1135eee697d6d4abb739e
Author: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
Date:   Sun May 8 18:55:53 2022 +0100

    iio: adc: ad7476: Fix alignment for DMA safety
    
    [ Upstream commit 58b74555afc8affe4ae4f57d396349158433fc80 ]
    
     ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1.  Switch to the updated
    IIO_DMA_MINALIGN definition.
    
    Update the comment to reflect that DMA safety 'may' require separate
    cachelines.
    
    Fixes tag is unlikely to be the actual introdution of the problem but is
    far enough back to cover any likely backporting.
    
    Fixes: 7a28fe3c93d6 ("staging:iio:ad7476: Squash driver into a single file.")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
    Acked-by: Nuno Sá <nuno.sa@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20220508175712.647246-14-jic23@xxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/iio/adc/ad7476.c b/drivers/iio/adc/ad7476.c
index a1e8b32671cf..94776f696290 100644
--- a/drivers/iio/adc/ad7476.c
+++ b/drivers/iio/adc/ad7476.c
@@ -44,13 +44,12 @@ struct ad7476_state {
 	struct spi_transfer		xfer;
 	struct spi_message		msg;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * Make the buffer large enough for one 16 bit sample and one 64 bit
 	 * aligned 64 bit timestamp.
 	 */
-	unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
-			____cacheline_aligned;
+	unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad7476_supported_device_ids {



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