This is a note to let you know that I've just added the patch titled EDAC/synopsys: Use the correct register to disable the error interrupt on v3 hw to the 5.18-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: edac-synopsys-use-the-correct-register-to-disable-the-error-interrupt-on-v3-hw.patch and it can be found in the queue-5.18 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From be76ceaf03bc04e74be5e28f608316b73c2b04ad Mon Sep 17 00:00:00 2001 From: Sherry Sun <sherry.sun@xxxxxxx> Date: Wed, 27 Apr 2022 09:51:36 +0800 Subject: EDAC/synopsys: Use the correct register to disable the error interrupt on v3 hw From: Sherry Sun <sherry.sun@xxxxxxx> commit be76ceaf03bc04e74be5e28f608316b73c2b04ad upstream. v3.x Synopsys EDAC DDR doesn't have the QOS Interrupt register. Use the ECC Clear Register to disable the error interrupts instead. Fixes: f7824ded4149 ("EDAC/synopsys: Add support for version 3 of the Synopsys EDAC DDR") Signed-off-by: Sherry Sun <sherry.sun@xxxxxxx> Signed-off-by: Borislav Petkov <bp@xxxxxxx> Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@xxxxxxxxxx> Acked-by: Michal Simek <michal.simek@xxxxxxxxxx> Cc: <stable@xxxxxxxxxxxxxxx> Link: https://lore.kernel.org/r/20220427015137.8406-2-sherry.sun@xxxxxxx Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- drivers/edac/synopsys_edac.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -865,8 +865,11 @@ static void enable_intr(struct synps_eda static void disable_intr(struct synps_edac_priv *priv) { /* Disable UE/CE Interrupts */ - writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK, - priv->baseaddr + DDR_QOS_IRQ_DB_OFST); + if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR) + writel(0x0, priv->baseaddr + ECC_CLR_OFST); + else + writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK, + priv->baseaddr + DDR_QOS_IRQ_DB_OFST); } static int setup_irq(struct mem_ctl_info *mci, Patches currently in stable-queue which might be from sherry.sun@xxxxxxx are queue-5.18/edac-synopsys-re-enable-the-error-interrupts-on-v3-hw.patch queue-5.18/edac-synopsys-use-the-correct-register-to-disable-the-error-interrupt-on-v3-hw.patch