Patch "arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC" has been added to the 5.18-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC

to the 5.18-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-broadcom-bcm4908-fix-timer-node-for-bcm490.patch
and it can be found in the queue-5.18 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 4f5b5081d3cd73ad96822ff71b2df73fa67f6158
Author: William Zhang <william.zhang@xxxxxxxxxxxx>
Date:   Fri Jul 8 11:25:06 2022 -0700

    arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC
    
    [ Upstream commit b4a544e415e9be33b37d9bfa9d9f9f4d13f553d6 ]
    
    The cpu mask value in interrupt property inherits from bcm4908.dtsi
    which sets to four cpus. Correct the value to two cpus for dual core
    BCM4906 SoC.
    
    Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P DTS files")
    Signed-off-by: William Zhang <william.zhang@xxxxxxxxxxxx>
    Signed-off-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
index 66023d553524..d084c33d5ca8 100644
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
@@ -9,6 +9,14 @@ cpus {
 		/delete-node/ cpu@3;
 	};
 
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
 	pmu {
 		compatible = "arm,cortex-a53-pmu";
 		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,



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