This is a note to let you know that I've just added the patch titled
x86/cpu/amd: Add Spectral Chicken
to the 5.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
x86-cpu-amd-add-spectral-chicken.patch
and it can be found in the queue-5.15 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From foo@baz Tue Jul 12 05:06:57 PM CEST 2022
From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Date: Tue, 14 Jun 2022 23:16:04 +0200
Subject: x86/cpu/amd: Add Spectral Chicken
From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
commit d7caac991feeef1b871ee6988fd2c9725df09039 upstream.
Zen2 uarchs have an undocumented, unnamed, MSR that contains a chicken
bit for some speculation behaviour. It needs setting.
Note: very belatedly AMD released naming; it's now officially called
MSR_AMD64_DE_CFG2 and MSR_AMD64_DE_CFG2_SUPPRESS_NOBR_PRED_BIT
but shall remain the SPECTRAL CHICKEN.
Suggested-by: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Reviewed-by: Josh Poimboeuf <jpoimboe@xxxxxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@xxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/x86/include/asm/msr-index.h | 3 +++
arch/x86/kernel/cpu/amd.c | 23 ++++++++++++++++++++++-
arch/x86/kernel/cpu/cpu.h | 2 ++
arch/x86/kernel/cpu/hygon.c | 6 ++++++
4 files changed, 33 insertions(+), 1 deletion(-)
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -515,6 +515,9 @@
/* Fam 17h MSRs */
#define MSR_F17H_IRPERF 0xc00000e9
+#define MSR_ZEN2_SPECTRAL_CHICKEN 0xc00110e3
+#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT BIT_ULL(1)
+
/* Fam 16h MSRs */
#define MSR_F16H_L2I_PERF_CTL 0xc0010230
#define MSR_F16H_L2I_PERF_CTR 0xc0010231
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -886,6 +886,26 @@ static void init_amd_bd(struct cpuinfo_x
clear_rdrand_cpuid_bit(c);
}
+void init_spectral_chicken(struct cpuinfo_x86 *c)
+{
+ u64 value;
+
+ /*
+ * On Zen2 we offer this chicken (bit) on the altar of Speculation.
+ *
+ * This suppresses speculation from the middle of a basic block, i.e. it
+ * suppresses non-branch predictions.
+ *
+ * We use STIBP as a heuristic to filter out Zen2 from the rest of F17H
+ */
+ if (!cpu_has(c, X86_FEATURE_HYPERVISOR) && cpu_has(c, X86_FEATURE_AMD_STIBP)) {
+ if (!rdmsrl_safe(MSR_ZEN2_SPECTRAL_CHICKEN, &value)) {
+ value |= MSR_ZEN2_SPECTRAL_CHICKEN_BIT;
+ wrmsrl_safe(MSR_ZEN2_SPECTRAL_CHICKEN, value);
+ }
+ }
+}
+
static void init_amd_zn(struct cpuinfo_x86 *c)
{
set_cpu_cap(c, X86_FEATURE_ZEN);
@@ -931,7 +951,8 @@ static void init_amd(struct cpuinfo_x86
case 0x12: init_amd_ln(c); break;
case 0x15: init_amd_bd(c); break;
case 0x16: init_amd_jg(c); break;
- case 0x17: fallthrough;
+ case 0x17: init_spectral_chicken(c);
+ fallthrough;
case 0x19: init_amd_zn(c); break;
}
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -61,6 +61,8 @@ static inline void tsx_init(void) { }
static inline void tsx_ap_init(void) { }
#endif /* CONFIG_CPU_SUP_INTEL */
+extern void init_spectral_chicken(struct cpuinfo_x86 *c);
+
extern void get_cpu_cap(struct cpuinfo_x86 *c);
extern void get_cpu_address_sizes(struct cpuinfo_x86 *c);
extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
--- a/arch/x86/kernel/cpu/hygon.c
+++ b/arch/x86/kernel/cpu/hygon.c
@@ -302,6 +302,12 @@ static void init_hygon(struct cpuinfo_x8
/* get apicid instead of initial apic id from cpuid */
c->apicid = hard_smp_processor_id();
+ /*
+ * XXX someone from Hygon needs to confirm this DTRT
+ *
+ init_spectral_chicken(c);
+ */
+
set_cpu_cap(c, X86_FEATURE_ZEN);
set_cpu_cap(c, X86_FEATURE_CPB);
Patches currently in stable-queue which might be from peterz@xxxxxxxxxxxxx are
queue-5.15/x86-sev-avoid-using-__x86_return_thunk.patch
queue-5.15/x86-ftrace-use-alternative-ret-encoding.patch
queue-5.15/objtool-re-add-unwind_hint_-save_restore.patch
queue-5.15/x86-bugs-add-retbleed-ibpb.patch
queue-5.15/x86-bugs-enable-stibp-for-jmp2ret.patch
queue-5.15/x86-retpoline-cleanup-some-ifdefery.patch
queue-5.15/kvm-vmx-flatten-__vmx_vcpu_run.patch
queue-5.15/x86-kvm-vmx-make-noinstr-clean.patch
queue-5.15/objtool-x86-replace-alternatives-with-.retpoline_sites.patch
queue-5.15/x86-retbleed-add-fine-grained-kconfig-knobs.patch
queue-5.15/x86-cpu-amd-add-spectral-chicken.patch
queue-5.15/kvm-vmx-fix-ibrs-handling-after-vmexit.patch
queue-5.15/kvm-vmx-prevent-guest-rsb-poisoning-attacks-with-eibrs.patch
queue-5.15/x86-vsyscall_emu-64-don-t-use-ret-in-vsyscall-emulation.patch
queue-5.15/x86-add-magic-amd-return-thunk.patch
queue-5.15/x86-bugs-keep-a-per-cpu-ia32_spec_ctrl-value.patch
queue-5.15/x86-objtool-create-.return_sites.patch
queue-5.15/x86-alternative-handle-jcc-__x86_indirect_thunk_-reg.patch
queue-5.15/x86-kvm-fix-setcc-emulation-for-return-thunks.patch
queue-5.15/x86-retpoline-swizzle-retpoline-thunk.patch
queue-5.15/x86-speculation-fix-firmware-entry-spec_ctrl-handling.patch
queue-5.15/x86-retpoline-remove-unused-replacement-symbols.patch
queue-5.15/x86-speculation-add-spectre_v2-ibrs-option-to-support-kernel-ibrs.patch
queue-5.15/x86-xen-add-untrain_ret.patch
queue-5.15/bpf-x86-respect-x86_feature_retpoline.patch
queue-5.15/x86-undo-return-thunk-damage.patch
queue-5.15/x86-entry-avoid-very-early-ret.patch
queue-5.15/x86-entry-move-push_and_clear_regs-back-into-error_entry.patch
queue-5.15/x86-retpoline-create-a-retpoline-thunk-array.patch
queue-5.15/x86-asm-fix-register-order.patch
queue-5.15/x86-speculation-fill-rsb-on-vmexit-for-ibrs.patch
queue-5.15/objtool-add-entry-unret-validation.patch
queue-5.15/objtool-shrink-struct-instruction.patch
queue-5.15/kvm-vmx-convert-launched-argument-to-flags.patch
queue-5.15/x86-bpf-use-alternative-ret-encoding.patch
queue-5.15/x86-common-stamp-out-the-stepping-madness.patch
queue-5.15/x86-bugs-split-spectre_v2_select_mitigation-and-spectre_v2_user_select_mitigation.patch
queue-5.15/x86-bugs-report-intel-retbleed-vulnerability.patch
queue-5.15/bpf-x86-simplify-computing-label-offsets.patch
queue-5.15/x86-cpufeatures-move-retpoline-flags-to-word-11.patch
queue-5.15/x86-speculation-fix-spec_ctrl-write-on-smt-state-change.patch
queue-5.15/x86-retpoline-use-mfunction-return.patch
queue-5.15/x86-xen-rename-sys-entry-points.patch
queue-5.15/x86-bugs-optimize-spec_ctrl-msr-writes.patch
queue-5.15/x86-bugs-report-amd-retbleed-vulnerability.patch
queue-5.15/x86-static_call-use-alternative-ret-encoding.patch
queue-5.15/x86-speculation-fix-rsb-filling-with-config_retpoline-n.patch
queue-5.15/x86-asm-fixup-odd-gen-for-each-reg.h-usage.patch
queue-5.15/x86-alternative-add-debug-prints-to-apply_retpolines.patch
queue-5.15/x86-use-return-thunk-in-asm-code.patch
queue-5.15/objtool-classify-symbols.patch
queue-5.15/intel_idle-disable-ibrs-during-long-idle.patch
queue-5.15/x86-retpoline-move-the-retpoline-thunk-declarations-to-nospec-branch.h.patch
queue-5.15/x86-alternative-implement-.retpoline_sites-support.patch
queue-5.15/x86-alternative-try-inline-spectre_v2-retpoline-amd.patch
queue-5.15/x86-entry-remove-skip_r11rcx.patch
queue-5.15/objtool-explicitly-avoid-self-modifying-code-in-.altinstr_replacement.patch
queue-5.15/x86-speculation-use-cached-host-spec_ctrl-value-for-guest-entry-exit.patch
queue-5.15/x86-bugs-add-amd-retbleed-boot-parameter.patch
queue-5.15/x86-entry-add-kernel-ibrs-implementation.patch
queue-5.15/objtool-treat-.text.__x86.-as-noinstr.patch
queue-5.15/objtool-introduce-cfi-hash.patch
queue-5.15/objtool-default-ignore-int3-for-unreachable.patch
queue-5.15/objtool-update-retpoline-validation.patch
