This is a note to let you know that I've just added the patch titled
x86/alternative: Try inline spectre_v2=retpoline,amd
to the 5.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
x86-alternative-try-inline-spectre_v2-retpoline-amd.patch
and it can be found in the queue-5.15 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From foo@baz Tue Jul 12 05:06:57 PM CEST 2022
From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Date: Tue, 26 Oct 2021 14:01:44 +0200
Subject: x86/alternative: Try inline spectre_v2=retpoline,amd
From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
commit bbe2df3f6b6da7848398d55b1311d58a16ec21e4 upstream.
Try and replace retpoline thunk calls with:
LFENCE
CALL *%\reg
for spectre_v2=retpoline,amd.
Specifically, the sequence above is 5 bytes for the low 8 registers,
but 6 bytes for the high 8 registers. This means that unless the
compilers prefix stuff the call with higher registers this replacement
will fail.
Luckily GCC strongly favours RAX for the indirect calls and most (95%+
for defconfig-x86_64) will be converted. OTOH clang strongly favours
R11 and almost nothing gets converted.
Note: it will also generate a correct replacement for the Jcc.d32
case, except unless the compilers start to prefix stuff that, it'll
never fit. Specifically:
Jncc.d8 1f
LFENCE
JMP *%\reg
1:
is 7-8 bytes long, where the original instruction in unpadded form is
only 6 bytes.
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Reviewed-by: Borislav Petkov <bp@xxxxxxx>
Acked-by: Josh Poimboeuf <jpoimboe@xxxxxxxxxx>
Tested-by: Alexei Starovoitov <ast@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20211026120310.359986601@xxxxxxxxxxxxx
[cascardo: RETPOLINE_AMD was renamed to RETPOLINE_LFENCE]
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@xxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/x86/kernel/alternative.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -389,6 +389,7 @@ static int emit_indirect(int op, int reg
*
* CALL *%\reg
*
+ * It also tries to inline spectre_v2=retpoline,amd when size permits.
*/
static int patch_retpoline(void *addr, struct insn *insn, u8 *bytes)
{
@@ -405,7 +406,8 @@ static int patch_retpoline(void *addr, s
/* If anyone ever does: CALL/JMP *%rsp, we're in deep trouble. */
BUG_ON(reg == 4);
- if (cpu_feature_enabled(X86_FEATURE_RETPOLINE))
+ if (cpu_feature_enabled(X86_FEATURE_RETPOLINE) &&
+ !cpu_feature_enabled(X86_FEATURE_RETPOLINE_LFENCE))
return -1;
op = insn->opcode.bytes[0];
@@ -418,8 +420,9 @@ static int patch_retpoline(void *addr, s
* into:
*
* Jncc.d8 1f
+ * [ LFENCE ]
* JMP *%\reg
- * NOP
+ * [ NOP ]
* 1:
*/
/* Jcc.d32 second opcode byte is in the range: 0x80-0x8f */
@@ -434,6 +437,15 @@ static int patch_retpoline(void *addr, s
op = JMP32_INSN_OPCODE;
}
+ /*
+ * For RETPOLINE_AMD: prepend the indirect CALL/JMP with an LFENCE.
+ */
+ if (cpu_feature_enabled(X86_FEATURE_RETPOLINE_LFENCE)) {
+ bytes[i++] = 0x0f;
+ bytes[i++] = 0xae;
+ bytes[i++] = 0xe8; /* LFENCE */
+ }
+
ret = emit_indirect(op, reg, bytes + i);
if (ret < 0)
return ret;
Patches currently in stable-queue which might be from peterz@xxxxxxxxxxxxx are
queue-5.15/x86-sev-avoid-using-__x86_return_thunk.patch
queue-5.15/x86-ftrace-use-alternative-ret-encoding.patch
queue-5.15/objtool-re-add-unwind_hint_-save_restore.patch
queue-5.15/x86-bugs-add-retbleed-ibpb.patch
queue-5.15/x86-bugs-enable-stibp-for-jmp2ret.patch
queue-5.15/x86-retpoline-cleanup-some-ifdefery.patch
queue-5.15/kvm-vmx-flatten-__vmx_vcpu_run.patch
queue-5.15/x86-kvm-vmx-make-noinstr-clean.patch
queue-5.15/objtool-x86-replace-alternatives-with-.retpoline_sites.patch
queue-5.15/x86-retbleed-add-fine-grained-kconfig-knobs.patch
queue-5.15/x86-cpu-amd-add-spectral-chicken.patch
queue-5.15/kvm-vmx-fix-ibrs-handling-after-vmexit.patch
queue-5.15/kvm-vmx-prevent-guest-rsb-poisoning-attacks-with-eibrs.patch
queue-5.15/x86-vsyscall_emu-64-don-t-use-ret-in-vsyscall-emulation.patch
queue-5.15/x86-add-magic-amd-return-thunk.patch
queue-5.15/x86-bugs-keep-a-per-cpu-ia32_spec_ctrl-value.patch
queue-5.15/x86-objtool-create-.return_sites.patch
queue-5.15/x86-alternative-handle-jcc-__x86_indirect_thunk_-reg.patch
queue-5.15/x86-kvm-fix-setcc-emulation-for-return-thunks.patch
queue-5.15/x86-retpoline-swizzle-retpoline-thunk.patch
queue-5.15/x86-speculation-fix-firmware-entry-spec_ctrl-handling.patch
queue-5.15/x86-retpoline-remove-unused-replacement-symbols.patch
queue-5.15/x86-speculation-add-spectre_v2-ibrs-option-to-support-kernel-ibrs.patch
queue-5.15/x86-xen-add-untrain_ret.patch
queue-5.15/bpf-x86-respect-x86_feature_retpoline.patch
queue-5.15/x86-undo-return-thunk-damage.patch
queue-5.15/x86-entry-avoid-very-early-ret.patch
queue-5.15/x86-entry-move-push_and_clear_regs-back-into-error_entry.patch
queue-5.15/x86-retpoline-create-a-retpoline-thunk-array.patch
queue-5.15/x86-asm-fix-register-order.patch
queue-5.15/x86-speculation-fill-rsb-on-vmexit-for-ibrs.patch
queue-5.15/objtool-add-entry-unret-validation.patch
queue-5.15/objtool-shrink-struct-instruction.patch
queue-5.15/kvm-vmx-convert-launched-argument-to-flags.patch
queue-5.15/x86-bpf-use-alternative-ret-encoding.patch
queue-5.15/x86-common-stamp-out-the-stepping-madness.patch
queue-5.15/x86-bugs-split-spectre_v2_select_mitigation-and-spectre_v2_user_select_mitigation.patch
queue-5.15/x86-bugs-report-intel-retbleed-vulnerability.patch
queue-5.15/bpf-x86-simplify-computing-label-offsets.patch
queue-5.15/x86-cpufeatures-move-retpoline-flags-to-word-11.patch
queue-5.15/x86-speculation-fix-spec_ctrl-write-on-smt-state-change.patch
queue-5.15/x86-retpoline-use-mfunction-return.patch
queue-5.15/x86-xen-rename-sys-entry-points.patch
queue-5.15/x86-bugs-optimize-spec_ctrl-msr-writes.patch
queue-5.15/x86-bugs-report-amd-retbleed-vulnerability.patch
queue-5.15/x86-static_call-use-alternative-ret-encoding.patch
queue-5.15/x86-speculation-fix-rsb-filling-with-config_retpoline-n.patch
queue-5.15/x86-asm-fixup-odd-gen-for-each-reg.h-usage.patch
queue-5.15/x86-alternative-add-debug-prints-to-apply_retpolines.patch
queue-5.15/x86-use-return-thunk-in-asm-code.patch
queue-5.15/objtool-classify-symbols.patch
queue-5.15/intel_idle-disable-ibrs-during-long-idle.patch
queue-5.15/x86-retpoline-move-the-retpoline-thunk-declarations-to-nospec-branch.h.patch
queue-5.15/x86-alternative-implement-.retpoline_sites-support.patch
queue-5.15/x86-alternative-try-inline-spectre_v2-retpoline-amd.patch
queue-5.15/x86-entry-remove-skip_r11rcx.patch
queue-5.15/objtool-explicitly-avoid-self-modifying-code-in-.altinstr_replacement.patch
queue-5.15/x86-speculation-use-cached-host-spec_ctrl-value-for-guest-entry-exit.patch
queue-5.15/x86-bugs-add-amd-retbleed-boot-parameter.patch
queue-5.15/x86-entry-add-kernel-ibrs-implementation.patch
queue-5.15/objtool-treat-.text.__x86.-as-noinstr.patch
queue-5.15/objtool-introduce-cfi-hash.patch
queue-5.15/objtool-default-ignore-int3-for-unreachable.patch
queue-5.15/objtool-update-retpoline-validation.patch
