This is a note to let you know that I've just added the patch titled
arm64: tegra: Add missing DFLL reset on Tegra210
to the 5.17-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-tegra-add-missing-dfll-reset-on-tegra210.patch
and it can be found in the queue-5.17 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 0017f2c856e21bb900be88469e15dac4f41f4065 Mon Sep 17 00:00:00 2001
From: Diogo Ivo <diogo.ivo@xxxxxxxxxxxxxxxxxx>
Date: Fri, 29 Apr 2022 13:58:43 +0100
Subject: arm64: tegra: Add missing DFLL reset on Tegra210
From: Diogo Ivo <diogo.ivo@xxxxxxxxxxxxxxxxxx>
commit 0017f2c856e21bb900be88469e15dac4f41f4065 upstream.
Commit 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling
clocks") removed deassertion of reset lines when enabling peripheral
clocks. This breaks the initialization of the DFLL driver which relied
on this behaviour.
In order to be able to fix this, add the corresponding reset to the DT.
Tested on Google Pixel C.
Cc: stable@xxxxxxxxxxxxxxx
Fixes: 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks")
Signed-off-by: Diogo Ivo <diogo.ivo@xxxxxxxxxxxxxxxxxx>
Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1366,8 +1366,9 @@
<&tegra_car TEGRA210_CLK_DFLL_REF>,
<&tegra_car TEGRA210_CLK_I2C5>;
clock-names = "soc", "ref", "i2c";
- resets = <&tegra_car TEGRA210_RST_DFLL_DVCO>;
- reset-names = "dvco";
+ resets = <&tegra_car TEGRA210_RST_DFLL_DVCO>,
+ <&tegra_car 155>;
+ reset-names = "dvco", "dfll";
#clock-cells = <0>;
clock-output-names = "dfllCPU_out";
status = "disabled";
Patches currently in stable-queue which might be from diogo.ivo@xxxxxxxxxxxxxxxxxx are
queue-5.17/clk-tegra-add-missing-reset-deassertion.patch
queue-5.17/arm64-tegra-add-missing-dfll-reset-on-tegra210.patch
