Patch "perf/amd/ibs: Use interrupt regs ip for stack unwinding" has been added to the 5.15-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    perf/amd/ibs: Use interrupt regs ip for stack unwinding

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     perf-amd-ibs-use-interrupt-regs-ip-for-stack-unwindi.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 4dd8389a6f7d2f81ac32f0ff85f19ae3bebcae99
Author: Ravi Bangoria <ravi.bangoria@xxxxxxx>
Date:   Fri Apr 29 10:44:41 2022 +0530

    perf/amd/ibs: Use interrupt regs ip for stack unwinding
    
    [ Upstream commit 3d47083b9ff46863e8374ad3bb5edb5e464c75f8 ]
    
    IbsOpRip is recorded when IBS interrupt is triggered. But there is
    a skid from the time IBS interrupt gets triggered to the time the
    interrupt is presented to the core. Meanwhile processor would have
    moved ahead and thus IbsOpRip will be inconsistent with rsp and rbp
    recorded as part of the interrupt regs. This causes issues while
    unwinding stack using the ORC unwinder as it needs consistent rip,
    rsp and rbp. Fix this by using rip from interrupt regs instead of
    IbsOpRip for stack unwinding.
    
    Fixes: ee9f8fce99640 ("x86/unwind: Add the ORC unwinder")
    Reported-by: Dmitry Monakhov <dmtrmonakhov@xxxxxxxxxxxxxx>
    Suggested-by: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
    Signed-off-by: Ravi Bangoria <ravi.bangoria@xxxxxxx>
    Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
    Link: https://lkml.kernel.org/r/20220429051441.14251-1-ravi.bangoria@xxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 367ca899e6e8..2704ec1e42a3 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -304,6 +304,16 @@ static int perf_ibs_init(struct perf_event *event)
 	hwc->config_base = perf_ibs->msr;
 	hwc->config = config;
 
+	/*
+	 * rip recorded by IbsOpRip will not be consistent with rsp and rbp
+	 * recorded as part of interrupt regs. Thus we need to use rip from
+	 * interrupt regs while unwinding call stack. Setting _EARLY flag
+	 * makes sure we unwind call-stack before perf sample rip is set to
+	 * IbsOpRip.
+	 */
+	if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN)
+		event->attr.sample_type |= __PERF_SAMPLE_CALLCHAIN_EARLY;
+
 	return 0;
 }
 
@@ -687,6 +697,14 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
 		data.raw = &raw;
 	}
 
+	/*
+	 * rip recorded by IbsOpRip will not be consistent with rsp and rbp
+	 * recorded as part of interrupt regs. Thus we need to use rip from
+	 * interrupt regs while unwinding call stack.
+	 */
+	if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN)
+		data.callchain = perf_callchain(event, iregs);
+
 	throttle = perf_event_overflow(event, &data, &regs);
 out:
 	if (throttle) {