Patch "KVM: x86/svm: Clear reserved bits written to PerfEvtSeln MSRs" has been added to the 5.15-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    KVM: x86/svm: Clear reserved bits written to PerfEvtSeln MSRs

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     kvm-x86-svm-clear-reserved-bits-written-to-perfevtse.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 80d87dcd9de61caf20596d192a604aea4e132fb9
Author: Jim Mattson <jmattson@xxxxxxxxxx>
Date:   Sat Feb 26 15:41:31 2022 -0800

    KVM: x86/svm: Clear reserved bits written to PerfEvtSeln MSRs
    
    [ Upstream commit 9b026073db2f1ad0e4d8b61c83316c8497981037 ]
    
    AMD EPYC CPUs never raise a #GP for a WRMSR to a PerfEvtSeln MSR. Some
    reserved bits are cleared, and some are not. Specifically, on
    Zen3/Milan, bits 19 and 42 are not cleared.
    
    When emulating such a WRMSR, KVM should not synthesize a #GP,
    regardless of which bits are set. However, undocumented bits should
    not be passed through to the hardware MSR. So, rather than checking
    for reserved bits and synthesizing a #GP, just clear the reserved
    bits.
    
    This may seem pedantic, but since KVM currently does not support the
    "Host/Guest Only" bits (41:40), it is necessary to clear these bits
    rather than synthesizing #GP, because some popular guests (e.g Linux)
    will set the "Host Only" bit even on CPUs that don't support
    EFER.SVME, and they don't expect a #GP.
    
    For example,
    
    root@Ubuntu1804:~# perf stat -e r26 -a sleep 1
    
     Performance counter stats for 'system wide':
    
                     0      r26
    
           1.001070977 seconds time elapsed
    
    Feb 23 03:59:58 Ubuntu1804 kernel: [  405.379957] unchecked MSR access error: WRMSR to 0xc0010200 (tried to write 0x0000020000130026) at rIP: 0xffffffff9b276a28 (native_write_msr+0x8/0x30)
    Feb 23 03:59:58 Ubuntu1804 kernel: [  405.379958] Call Trace:
    Feb 23 03:59:58 Ubuntu1804 kernel: [  405.379963]  amd_pmu_disable_event+0x27/0x90
    
    Fixes: ca724305a2b0 ("KVM: x86/vPMU: Implement AMD vPMU code for KVM")
    Reported-by: Lotus Fenn <lotusf@xxxxxxxxxx>
    Signed-off-by: Jim Mattson <jmattson@xxxxxxxxxx>
    Reviewed-by: Like Xu <likexu@xxxxxxxxxxx>
    Reviewed-by: David Dunn <daviddunn@xxxxxxxxxx>
    Message-Id: <20220226234131.2167175-1-jmattson@xxxxxxxxxx>
    Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c
index 369164368819..3faf1d9c6c91 100644
--- a/arch/x86/kvm/svm/pmu.c
+++ b/arch/x86/kvm/svm/pmu.c
@@ -261,12 +261,10 @@ static int amd_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 	/* MSR_EVNTSELn */
 	pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL);
 	if (pmc) {
-		if (data == pmc->eventsel)
-			return 0;
-		if (!(data & pmu->reserved_bits)) {
+		data &= ~pmu->reserved_bits;
+		if (data != pmc->eventsel)
 			reprogram_gp_counter(pmc, data);
-			return 0;
-		}
+		return 0;
 	}
 
 	return 1;