From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> commit 1937f3feb0e84089ae4065e09c871b8ab4676f01 upstream. For modern platforms the spec explicitly states that a SAGV block time of zero means that SAGV is not supported. Let's extend that to all platforms. Supposedly there should be no systems where this isn't true, and it'll allow us to: - use the same code regardless of older vs. newer platform - wm latencies already treat 0 as disabled, so this fits well with other related code - make it a bit more clear when SAGV is used vs. not - avoid overflows from adding U32_MAX with a u16 wm0 latency value which could cause us to miscalculate the SAGV watermarks on tgl+ Cc: stable@xxxxxxxxxxxxxxx Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Link: https://patchwork.freedesktop.org/patch/msgid/20220309164948.10671-2-ville.syrjala@xxxxxxxxxxxxxxx Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx> (cherry picked from commit d8f5855b31c0523ea3b171db8dfb998830e8735d) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_pm.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3713,8 +3713,7 @@ skl_setup_sagv_block_time(struct drm_i91 MISSING_CASE(DISPLAY_VER(dev_priv)); } - /* Default to an unusable block time */ - dev_priv->sagv_block_time_us = -1; + dev_priv->sagv_block_time_us = 0; } /* @@ -5635,7 +5634,7 @@ static void skl_compute_plane_wm(const s result->min_ddb_alloc = max(min_ddb_alloc, blocks) + 1; result->enable = true; - if (DISPLAY_VER(dev_priv) < 12) + if (DISPLAY_VER(dev_priv) < 12 && dev_priv->sagv_block_time_us) result->can_sagv = latency >= dev_priv->sagv_block_time_us; } @@ -5666,7 +5665,10 @@ static void tgl_compute_sagv_wm(const st struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); struct skl_wm_level *sagv_wm = &plane_wm->sagv.wm0; struct skl_wm_level *levels = plane_wm->wm; - unsigned int latency = dev_priv->wm.skl_latency[0] + dev_priv->sagv_block_time_us; + unsigned int latency = 0; + + if (dev_priv->sagv_block_time_us) + latency = dev_priv->sagv_block_time_us + dev_priv->wm.skl_latency[0]; skl_compute_plane_wm(crtc_state, 0, latency, wm_params, &levels[0], Patches currently in stable-queue which might be from ville.syrjala@xxxxxxxxxxxxxxx are queue-5.15/drm-edid-don-t-clear-formats-if-using-deep-color.patch queue-5.15/drm-i915-treat-sagv-block-time-0-as-sagv-disabled.patch queue-5.15/drm-i915-reject-unsupported-tmds-rates-on-icl.patch queue-5.15/drm-i915-display-fix-hpd-short-pulse-handling-for-ed.patch queue-5.15/drm-i915-opregion-check-port-number-bounds-for-swsci-display-power-state.patch queue-5.15/drm-i915-fix-psf-gv-point-mask-when-sagv-is-not-possible.patch queue-5.15/drm-edid-split-deep-color-modes-between-rgb-and-yuv4.patch