From: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
commit 1b7101e8124b450f2d6a35591e9cbb478c143ace upstream.
Fix the MSI IRQ used for PCIe instances 1 and 2.
Cc: stable@xxxxxxxxxxxxxxx
Fixes: e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support")
Reported-by: Jordan Crouse <jordan@xxxxxxxxxxxxxxxxx>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20220112035556.5108-1-manivannan.sadhasivam@xxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1801,7 +1801,7 @@
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
- interrupts = <GIC_SPI 306 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
@@ -1907,7 +1907,7 @@
ranges = <0x01000000 0x0 0x64200000 0x0 0x64200000 0x0 0x100000>,
<0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>;
- interrupts = <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
Patches currently in stable-queue which might be from manivannan.sadhasivam@xxxxxxxxxx are
queue-5.17/bus-mhi-fix-pm_state-conversion-to-string.patch
queue-5.17/bus-mhi-fix-mhi-dma-structure-endianness.patch
queue-5.17/arm64-dts-qcom-sm8250-fix-msi-irq-for-pcie1-and-pcie2.patch
queue-5.17/bus-mhi-pci_generic-add-mru_default-for-quectel-em1xx-series.patch
