From: James Morse <james.morse@xxxxxxx>
commit dee435be76f4117410bbd90573a881fd33488f37 upstream.
Speculation attacks against some high-performance processors can
make use of branch history to influence future speculation as part of
a spectre-v2 attack. This is not mitigated by CSV2, meaning CPUs that
previously reported 'Not affected' are now moderately mitigated by CSV2.
Update the value in /sys/devices/system/cpu/vulnerabilities/spectre_v2
to also show the state of the BHB mitigation.
Reviewed-by: Catalin Marinas <catalin.marinas@xxxxxxx>
[ code move to cpu_errata.c for backport ]
Signed-off-by: James Morse <james.morse@xxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm64/include/asm/cpufeature.h | 8 +++++++
arch/arm64/kernel/cpu_errata.c | 38 +++++++++++++++++++++++++++++++++---
2 files changed, 43 insertions(+), 3 deletions(-)
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -495,6 +495,14 @@ static inline int arm64_get_ssbd_state(v
void arm64_set_ssbd_mitigation(bool state);
+/* Watch out, ordering is important here. */
+enum mitigation_state {
+ SPECTRE_UNAFFECTED,
+ SPECTRE_MITIGATED,
+ SPECTRE_VULNERABLE,
+};
+
+enum mitigation_state arm64_get_spectre_bhb_state(void);
#endif /* __ASSEMBLY__ */
#endif
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -730,14 +730,39 @@ ssize_t cpu_show_spectre_v1(struct devic
return sprintf(buf, "Mitigation: __user pointer sanitization\n");
}
+static const char *get_bhb_affected_string(enum mitigation_state bhb_state)
+{
+ switch (bhb_state) {
+ case SPECTRE_UNAFFECTED:
+ return "";
+ default:
+ case SPECTRE_VULNERABLE:
+ return ", but not BHB";
+ case SPECTRE_MITIGATED:
+ return ", BHB";
+ }
+}
+
ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr,
char *buf)
{
- if (__spectrev2_safe)
- return sprintf(buf, "Not affected\n");
+ enum mitigation_state bhb_state = arm64_get_spectre_bhb_state();
+ const char *bhb_str = get_bhb_affected_string(bhb_state);
+ const char *v2_str = "Branch predictor hardening";
+
+ if (__spectrev2_safe) {
+ if (bhb_state == SPECTRE_UNAFFECTED)
+ return sprintf(buf, "Not affected\n");
+
+ /*
+ * Platforms affected by Spectre-BHB can't report
+ * "Not affected" for Spectre-v2.
+ */
+ v2_str = "CSV2";
+ }
if (__hardenbp_enab)
- return sprintf(buf, "Mitigation: Branch predictor hardening\n");
+ return sprintf(buf, "Mitigation: %s%s\n", v2_str, bhb_str);
return sprintf(buf, "Vulnerable\n");
}
@@ -758,3 +783,10 @@ ssize_t cpu_show_spec_store_bypass(struc
return sprintf(buf, "Vulnerable\n");
}
+
+static enum mitigation_state spectre_bhb_state;
+
+enum mitigation_state arm64_get_spectre_bhb_state(void)
+{
+ return spectre_bhb_state;
+}
Patches currently in stable-queue which might be from james.morse@xxxxxxx are
queue-4.14/arm64-entry-add-macro-for-reading-symbol-addresses-from-the-trampoline.patch
queue-4.14/arm64-use-the-clearbhb-instruction-in-mitigations.patch
queue-4.14/arm64-add-percpu-vectors-for-el1.patch
queue-4.14/arm64-arch_timer-add-workaround-for-arm-erratum-1188873.patch
queue-4.14/arm64-entry-free-up-another-register-on-kpti-s-tramp_exit-path.patch
queue-4.14/arm64-entry-don-t-assume-tramp_vectors-is-the-start-of-the-vectors.patch
queue-4.14/arm64-entry-make-the-trampoline-cleanup-optional.patch
queue-4.14/arm64-add-silicon-errata.txt-entry-for-arm-erratum-1188873.patch
queue-4.14/kvm-arm64-add-templates-for-bhb-mitigation-sequences.patch
queue-4.14/arm64-entry-add-non-kpti-__bp_harden_el1_vectors-for-mitigations.patch
queue-4.14/arm64-add-id_aa64isar2_el1-sys-register.patch
queue-4.14/kvm-arm64-allow-smccc_arch_workaround_3-to-be-discovered-and-migrated.patch
queue-4.14/arm64-add-neoverse-n2-cortex-a710-cpu-part-definition.patch
queue-4.14/arm64-arch_timer-avoid-unused-function-warning.patch
queue-4.14/arm64-entry-move-trampoline-macros-out-of-ifdef-d-section.patch
queue-4.14/arm64-entry-allow-tramp_alias-to-access-symbols-after-the-4k-boundary.patch
queue-4.14/arm64-add-part-number-for-arm-cortex-a77.patch
queue-4.14/arm64-entry-move-the-trampoline-data-page-before-the-text-page.patch
queue-4.14/arm64-entry.s-add-ventry-overflow-sanity-checks.patch
queue-4.14/arm64-add-part-number-for-neoverse-n1.patch
queue-4.14/arm64-entry-add-vectors-that-have-the-bhb-mitigation-sequences.patch
queue-4.14/arm64-make-arm64_erratum_1188873-depend-on-compat.patch
queue-4.14/arm64-mitigate-spectre-style-branch-history-side-channels.patch
queue-4.14/arm64-entry-allow-the-trampoline-text-to-occupy-multiple-pages.patch
queue-4.14/arm64-proton-pack-report-spectre-bhb-vulnerabilities-as-part-of-spectre-v2.patch
queue-4.14/arm64-add-cortex-x2-cpu-part-definition.patch
queue-4.14/arm64-entry-make-the-kpti-trampoline-s-kpti-sequence-optional.patch
