From: Arnd Bergmann <arnd@xxxxxxxx> commit 040f340134751d73bd03ee92fabb992946c55b3d upstream. arm64_1188873_read_cntvct_el0() is protected by the correct CONFIG_ARM64_ERRATUM_1188873 #ifdef, but the only reference to it is also inside of an CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND section, and causes a warning if that is disabled: drivers/clocksource/arm_arch_timer.c:323:20: error: 'arm64_1188873_read_cntvct_el0' defined but not used [-Werror=unused-function] Since the erratum requires that we always apply the workaround in the timer driver, select that symbol as we do for SoC specific errata. Fixes: 95b861a4a6d9 ("arm64: arch_timer: Add workaround for ARM erratum 1188873") Acked-by: Marc Zyngier <marc.zyngier@xxxxxxx> Signed-off-by: Arnd Bergmann <arnd@xxxxxxxx> Signed-off-by: Catalin Marinas <catalin.marinas@xxxxxxx> Signed-off-by: James Morse <james.morse@xxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+) --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -461,6 +461,7 @@ config ARM64_ERRATUM_1024718 config ARM64_ERRATUM_1188873 bool "Cortex-A76: MRC read following MRRC read of specific Generic Timer in AArch32 might give incorrect result" default y + select ARM_ARCH_TIMER_OOL_WORKAROUND help This option adds work arounds for ARM Cortex-A76 erratum 1188873 Patches currently in stable-queue which might be from james.morse@xxxxxxx are queue-4.14/arm64-entry-add-macro-for-reading-symbol-addresses-from-the-trampoline.patch queue-4.14/arm64-use-the-clearbhb-instruction-in-mitigations.patch queue-4.14/arm64-add-percpu-vectors-for-el1.patch queue-4.14/arm64-arch_timer-add-workaround-for-arm-erratum-1188873.patch queue-4.14/arm64-entry-free-up-another-register-on-kpti-s-tramp_exit-path.patch queue-4.14/arm64-entry-don-t-assume-tramp_vectors-is-the-start-of-the-vectors.patch queue-4.14/arm64-entry-make-the-trampoline-cleanup-optional.patch queue-4.14/arm64-add-silicon-errata.txt-entry-for-arm-erratum-1188873.patch queue-4.14/kvm-arm64-add-templates-for-bhb-mitigation-sequences.patch queue-4.14/arm64-entry-add-non-kpti-__bp_harden_el1_vectors-for-mitigations.patch queue-4.14/arm64-add-id_aa64isar2_el1-sys-register.patch queue-4.14/kvm-arm64-allow-smccc_arch_workaround_3-to-be-discovered-and-migrated.patch queue-4.14/arm64-add-neoverse-n2-cortex-a710-cpu-part-definition.patch queue-4.14/arm64-arch_timer-avoid-unused-function-warning.patch queue-4.14/arm64-entry-move-trampoline-macros-out-of-ifdef-d-section.patch queue-4.14/arm64-entry-allow-tramp_alias-to-access-symbols-after-the-4k-boundary.patch queue-4.14/arm64-add-part-number-for-arm-cortex-a77.patch queue-4.14/arm64-entry-move-the-trampoline-data-page-before-the-text-page.patch queue-4.14/arm64-entry.s-add-ventry-overflow-sanity-checks.patch queue-4.14/arm64-add-part-number-for-neoverse-n1.patch queue-4.14/arm64-entry-add-vectors-that-have-the-bhb-mitigation-sequences.patch queue-4.14/arm64-make-arm64_erratum_1188873-depend-on-compat.patch queue-4.14/arm64-mitigate-spectre-style-branch-history-side-channels.patch queue-4.14/arm64-entry-allow-the-trampoline-text-to-occupy-multiple-pages.patch queue-4.14/arm64-proton-pack-report-spectre-bhb-vulnerabilities-as-part-of-spectre-v2.patch queue-4.14/arm64-add-cortex-x2-cpu-part-definition.patch queue-4.14/arm64-entry-make-the-kpti-trampoline-s-kpti-sequence-optional.patch