From: Yonglin Tan <yonglin.tan@xxxxxxxxxxx> commit 2413ffbf19a95cfcd7adf63135c5a9343a66d0a2 upstream. For default mechanism, the driver uses default MRU 3500 if mru_default is not initialized. The Qualcomm configured the MRU size to 32768 in the WWAN device FW. So, we align the driver setting with Qualcomm FW setting. Link: https://lore.kernel.org/r/MEYP282MB2374EE345DADDB591AFDA6AFFD2E9@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx Fixes: ac4bf60bbaa0 ("bus: mhi: pci_generic: Introduce quectel EM1XXGR-L support") Cc: stable@xxxxxxxxxxxxxxx Reviewed-by: Manivannan Sadhasivam <mani@xxxxxxxxxx> Signed-off-by: Yonglin Tan <yonglin.tan@xxxxxxxxxxx> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> Link: https://lore.kernel.org/r/20220301160308.107452-2-manivannan.sadhasivam@xxxxxxxxxx Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- drivers/bus/mhi/pci_generic.c | 1 + 1 file changed, 1 insertion(+) --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -327,6 +327,7 @@ static const struct mhi_pci_dev_info mhi .config = &modem_quectel_em1xx_config, .bar_num = MHI_PCI_DEFAULT_BAR_NUM, .dma_data_width = 32, + .mru_default = 32768, .sideband_wake = true, }; Patches currently in stable-queue which might be from yonglin.tan@xxxxxxxxxxx are queue-5.17/bus-mhi-pci_generic-add-mru_default-for-quectel-em1xx-series.patch