This is a note to let you know that I've just added the patch titled
PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space
to the 5.16-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pci-pci-bridge-emul-properly-mark-reserved-pcie-bits-in-pci-config-space.patch
and it can be found in the queue-5.16 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 7b067ac63a5730d2fae18399fed7e45f23d36912 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@xxxxxxxxxx>
Date: Wed, 24 Nov 2021 16:59:40 +0100
Subject: PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space
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From: Pali Rohár <pali@xxxxxxxxxx>
commit 7b067ac63a5730d2fae18399fed7e45f23d36912 upstream.
Some bits in PCI config space are reserved when device is PCIe. Properly
define behavior of PCI registers for PCIe emulated bridge and ensure that
it would not be possible change these reserved bits.
Link: https://lore.kernel.org/r/20211124155944.1290-3-pali@xxxxxxxxxx
Fixes: 23a5fba4d941 ("PCI: Introduce PCI bridge emulated config space common logic")
Signed-off-by: Pali Rohár <pali@xxxxxxxxxx>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/pci/pci-bridge-emul.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -295,6 +295,27 @@ int pci_bridge_emul_init(struct pci_brid
kfree(bridge->pci_regs_behavior);
return -ENOMEM;
}
+ /* These bits are applicable only for PCI and reserved on PCIe */
+ bridge->pci_regs_behavior[PCI_CACHE_LINE_SIZE / 4].ro &=
+ ~GENMASK(15, 8);
+ bridge->pci_regs_behavior[PCI_COMMAND / 4].ro &=
+ ~((PCI_COMMAND_SPECIAL | PCI_COMMAND_INVALIDATE |
+ PCI_COMMAND_VGA_PALETTE | PCI_COMMAND_WAIT |
+ PCI_COMMAND_FAST_BACK) |
+ (PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK |
+ PCI_STATUS_DEVSEL_MASK) << 16);
+ bridge->pci_regs_behavior[PCI_PRIMARY_BUS / 4].ro &=
+ ~GENMASK(31, 24);
+ bridge->pci_regs_behavior[PCI_IO_BASE / 4].ro &=
+ ~((PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK |
+ PCI_STATUS_DEVSEL_MASK) << 16);
+ bridge->pci_regs_behavior[PCI_INTERRUPT_LINE / 4].rw &=
+ ~((PCI_BRIDGE_CTL_MASTER_ABORT |
+ BIT(8) | BIT(9) | BIT(11)) << 16);
+ bridge->pci_regs_behavior[PCI_INTERRUPT_LINE / 4].ro &=
+ ~((PCI_BRIDGE_CTL_FAST_BACK) << 16);
+ bridge->pci_regs_behavior[PCI_INTERRUPT_LINE / 4].w1c &=
+ ~(BIT(10) << 16);
}
if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
Patches currently in stable-queue which might be from pali@xxxxxxxxxx are
queue-5.16/pci-pci-bridge-emul-make-expansion-rom-base-address-register-read-only.patch
queue-5.16/pci-mvebu-fix-support-for-pci_bridge_ctl_bus_reset-o.patch
queue-5.16/pci-pci-bridge-emul-fix-definitions-of-reserved-bits.patch
queue-5.16/pci-mvebu-setup-pcie-controller-to-root-complex-mode.patch
queue-5.16/pci-pci-bridge-emul-correctly-set-pcie-capabilities.patch
queue-5.16/pci-mvebu-fix-support-for-pci_exp_devctl-on-emulated.patch
queue-5.16/pci-mvebu-do-not-modify-pci-io-type-bits-in-conf_wri.patch
queue-5.16/pci-mvebu-check-for-errors-from-pci_bridge_emul_init.patch
queue-5.16/pci-pci-bridge-emul-properly-mark-reserved-pcie-bits-in-pci-config-space.patch
queue-5.16/pci-pci-bridge-emul-set-pci_status_cap_list-for-pcie-device.patch
queue-5.16/pci-aardvark-fix-checking-for-mem-resource-type.patch
queue-5.16/arm-dts-armada-38x-add-generic-compatible-to-uart-no.patch
queue-5.16/pci-mvebu-fix-configuring-secondary-bus-of-pcie-root.patch
queue-5.16/pci-mvebu-fix-support-for-pci_exp_rtsta-on-emulated-.patch
queue-5.16/pci-mvebu-fix-support-for-bus-mastering-and-pci_comm.patch
queue-5.16/pci-mvebu-fix-support-for-devcap2-devctl2-and-lnkctl.patch
