Patch "powerpc/64s: Mask NIP before checking against SRR0" has been added to the 5.16-stable tree

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This is a note to let you know that I've just added the patch titled

    powerpc/64s: Mask NIP before checking against SRR0

to the 5.16-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     powerpc-64s-mask-nip-before-checking-against-srr0.patch
and it can be found in the queue-5.16 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 95050a6be411c92c2fb5266a086e64f441b7243b
Author: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
Date:   Wed Dec 22 00:50:59 2021 +1100

    powerpc/64s: Mask NIP before checking against SRR0
    
    [ Upstream commit 314f6c23dd8d417281eb9e8a516dd98036f2e7b3 ]
    
    When CONFIG_PPC_RFI_SRR_DEBUG=y we check that NIP and SRR0 match when
    returning from interrupts. This can trigger falsely if NIP has either of
    its two low bits set via sigreturn or ptrace, while SRR0 has its low two
    bits masked in hardware.
    
    As a quick fix make sure to mask the low bits before doing the check.
    
    Fixes: 59dc5bfca0cb ("powerpc/64s: avoid reloading (H)SRR registers if they are still valid")
    Reported-by: Sachin Sant <sachinp@xxxxxxxxxxxxxxxxxx>
    Signed-off-by: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
    Tested-by: Sachin Sant <sachinp@xxxxxxxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20211221135101.2085547-1-mpe@xxxxxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S
index ec950b08a8dcc..894588b2381e5 100644
--- a/arch/powerpc/kernel/interrupt_64.S
+++ b/arch/powerpc/kernel/interrupt_64.S
@@ -30,6 +30,7 @@ COMPAT_SYS_CALL_TABLE:
 	.ifc \srr,srr
 	mfspr	r11,SPRN_SRR0
 	ld	r12,_NIP(r1)
+	clrrdi  r12,r12,2
 100:	tdne	r11,r12
 	EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
 	mfspr	r11,SPRN_SRR1
@@ -39,6 +40,7 @@ COMPAT_SYS_CALL_TABLE:
 	.else
 	mfspr	r11,SPRN_HSRR0
 	ld	r12,_NIP(r1)
+	clrrdi  r12,r12,2
 100:	tdne	r11,r12
 	EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
 	mfspr	r11,SPRN_HSRR1



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