This is a note to let you know that I've just added the patch titled
gpio: gpio-aspeed-sgpio: Fix wrong hwirq base in irq handler
to the 5.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
gpio-gpio-aspeed-sgpio-fix-wrong-hwirq-base-in-irq-handler.patch
and it can be found in the queue-5.15 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From e5a7431f5a2d6dcff7d516ee9d178a3254b17b87 Mon Sep 17 00:00:00 2001
From: Steven Lee <steven_lee@xxxxxxxxxxxxxx>
Date: Tue, 14 Dec 2021 12:02:38 +0800
Subject: gpio: gpio-aspeed-sgpio: Fix wrong hwirq base in irq handler
From: Steven Lee <steven_lee@xxxxxxxxxxxxxx>
commit e5a7431f5a2d6dcff7d516ee9d178a3254b17b87 upstream.
Each aspeed sgpio bank has 64 gpio pins(32 input pins and 32 output pins).
The hwirq base for each sgpio bank should be multiples of 64 rather than
multiples of 32.
Signed-off-by: Steven Lee <steven_lee@xxxxxxxxxxxxxx>
Signed-off-by: Bartosz Golaszewski <brgl@xxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/gpio/gpio-aspeed-sgpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/gpio/gpio-aspeed-sgpio.c
+++ b/drivers/gpio/gpio-aspeed-sgpio.c
@@ -395,7 +395,7 @@ static void aspeed_sgpio_irq_handler(str
reg = ioread32(bank_reg(data, bank, reg_irq_status));
for_each_set_bit(p, ®, 32)
- generic_handle_domain_irq(gc->irq.domain, i * 32 + p * 2);
+ generic_handle_domain_irq(gc->irq.domain, (i * 32 + p) * 2);
}
chained_irq_exit(ic, desc);
Patches currently in stable-queue which might be from steven_lee@xxxxxxxxxxxxxx are
queue-5.15/gpio-gpio-aspeed-sgpio-fix-wrong-hwirq-base-in-irq-handler.patch
