This is a note to let you know that I've just added the patch titled
PCI: aardvark: Fix checking for link up via LTSSM state
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pci-aardvark-fix-checking-for-link-up-via-ltssm-state.patch
and it can be found in the queue-4.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From foo@baz Mon Nov 29 01:32:04 PM CET 2021
From: "Marek Behún" <kabel@xxxxxxxxxx>
Date: Wed, 24 Nov 2021 23:49:28 +0100
Subject: PCI: aardvark: Fix checking for link up via LTSSM state
To: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>, Sasha Levin <sashal@xxxxxxxxxx>
Cc: pali@xxxxxxxxxx, stable@xxxxxxxxxxxxxxx, "Marek Behún" <kabel@xxxxxxxxxx>, "Lorenzo Pieralisi" <lorenzo.pieralisi@xxxxxxx>, "Remi Pommarel" <repk@xxxxxxxxxxxx>
Message-ID: <20211124224933.24275-20-kabel@xxxxxxxxxx>
From: Pali Rohár <pali@xxxxxxxxxx>
commit 661c399a651c11aaf83c45cbfe0b4a1fb7bc3179 upstream.
Current implementation of advk_pcie_link_up() is wrong as it marks also
link disabled or hot reset states as link up.
Fix it by marking link up only to those states which are defined in PCIe
Base specification 3.0, Table 4-14: Link Status Mapped to the LTSSM.
To simplify implementation, Define macros for every LTSSM state which
aardvark hardware can return in CFG_REG register.
Fix also checking for link training according to the same Table 4-14.
Define a new function advk_pcie_link_training() for this purpose.
Link: https://lore.kernel.org/r/20211005180952.6812-13-kabel@xxxxxxxxxx
Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: Pali Rohár <pali@xxxxxxxxxx>
Signed-off-by: Marek Behún <kabel@xxxxxxxxxx>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
Reviewed-by: Marek Behún <kabel@xxxxxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Cc: Remi Pommarel <repk@xxxxxxxxxxxx>
Signed-off-by: Marek Behún <kabel@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/pci/host/pci-aardvark.c | 71 +++++++++++++++++++++++++++++++++++++---
1 file changed, 67 insertions(+), 4 deletions(-)
--- a/drivers/pci/host/pci-aardvark.c
+++ b/drivers/pci/host/pci-aardvark.c
@@ -152,9 +152,50 @@
#define CFG_REG (LMI_BASE_ADDR + 0x0)
#define LTSSM_SHIFT 24
#define LTSSM_MASK 0x3f
-#define LTSSM_L0 0x10
#define RC_BAR_CONFIG 0x300
+/* LTSSM values in CFG_REG */
+enum {
+ LTSSM_DETECT_QUIET = 0x0,
+ LTSSM_DETECT_ACTIVE = 0x1,
+ LTSSM_POLLING_ACTIVE = 0x2,
+ LTSSM_POLLING_COMPLIANCE = 0x3,
+ LTSSM_POLLING_CONFIGURATION = 0x4,
+ LTSSM_CONFIG_LINKWIDTH_START = 0x5,
+ LTSSM_CONFIG_LINKWIDTH_ACCEPT = 0x6,
+ LTSSM_CONFIG_LANENUM_ACCEPT = 0x7,
+ LTSSM_CONFIG_LANENUM_WAIT = 0x8,
+ LTSSM_CONFIG_COMPLETE = 0x9,
+ LTSSM_CONFIG_IDLE = 0xa,
+ LTSSM_RECOVERY_RCVR_LOCK = 0xb,
+ LTSSM_RECOVERY_SPEED = 0xc,
+ LTSSM_RECOVERY_RCVR_CFG = 0xd,
+ LTSSM_RECOVERY_IDLE = 0xe,
+ LTSSM_L0 = 0x10,
+ LTSSM_RX_L0S_ENTRY = 0x11,
+ LTSSM_RX_L0S_IDLE = 0x12,
+ LTSSM_RX_L0S_FTS = 0x13,
+ LTSSM_TX_L0S_ENTRY = 0x14,
+ LTSSM_TX_L0S_IDLE = 0x15,
+ LTSSM_TX_L0S_FTS = 0x16,
+ LTSSM_L1_ENTRY = 0x17,
+ LTSSM_L1_IDLE = 0x18,
+ LTSSM_L2_IDLE = 0x19,
+ LTSSM_L2_TRANSMIT_WAKE = 0x1a,
+ LTSSM_DISABLED = 0x20,
+ LTSSM_LOOPBACK_ENTRY_MASTER = 0x21,
+ LTSSM_LOOPBACK_ACTIVE_MASTER = 0x22,
+ LTSSM_LOOPBACK_EXIT_MASTER = 0x23,
+ LTSSM_LOOPBACK_ENTRY_SLAVE = 0x24,
+ LTSSM_LOOPBACK_ACTIVE_SLAVE = 0x25,
+ LTSSM_LOOPBACK_EXIT_SLAVE = 0x26,
+ LTSSM_HOT_RESET = 0x27,
+ LTSSM_RECOVERY_EQUALIZATION_PHASE0 = 0x28,
+ LTSSM_RECOVERY_EQUALIZATION_PHASE1 = 0x29,
+ LTSSM_RECOVERY_EQUALIZATION_PHASE2 = 0x2a,
+ LTSSM_RECOVERY_EQUALIZATION_PHASE3 = 0x2b,
+};
+
/* PCIe core controller registers */
#define CTRL_CORE_BASE_ADDR 0x18000
#define CTRL_CONFIG_REG (CTRL_CORE_BASE_ADDR + 0x0)
@@ -248,13 +289,35 @@ static inline u32 advk_readl(struct advk
return readl(pcie->base + reg);
}
-static int advk_pcie_link_up(struct advk_pcie *pcie)
+static u8 advk_pcie_ltssm_state(struct advk_pcie *pcie)
{
- u32 val, ltssm_state;
+ u32 val;
+ u8 ltssm_state;
val = advk_readl(pcie, CFG_REG);
ltssm_state = (val >> LTSSM_SHIFT) & LTSSM_MASK;
- return ltssm_state >= LTSSM_L0;
+ return ltssm_state;
+}
+
+static inline bool advk_pcie_link_up(struct advk_pcie *pcie)
+{
+ /* check if LTSSM is in normal operation - some L* state */
+ u8 ltssm_state = advk_pcie_ltssm_state(pcie);
+ return ltssm_state >= LTSSM_L0 && ltssm_state < LTSSM_DISABLED;
+}
+
+static inline bool advk_pcie_link_training(struct advk_pcie *pcie)
+{
+ /*
+ * According to PCIe Base specification 3.0, Table 4-14: Link
+ * Status Mapped to the LTSSM is Link Training mapped to LTSSM
+ * Configuration and Recovery states.
+ */
+ u8 ltssm_state = advk_pcie_ltssm_state(pcie);
+ return ((ltssm_state >= LTSSM_CONFIG_LINKWIDTH_START &&
+ ltssm_state < LTSSM_L0) ||
+ (ltssm_state >= LTSSM_RECOVERY_EQUALIZATION_PHASE0 &&
+ ltssm_state <= LTSSM_RECOVERY_EQUALIZATION_PHASE3));
}
static int advk_pcie_wait_for_link(struct advk_pcie *pcie)
Patches currently in stable-queue which might be from kabel@xxxxxxxxxx are
queue-4.14/pci-aardvark-move-pcie-reset-card-code-to-advk_pcie_train_link.patch
queue-4.14/pci-aardvark-introduce-an-advk_pcie_valid_device-helper.patch
queue-4.14/pci-aardvark-update-comment-about-disabling-link-training.patch
queue-4.14/pci-aardvark-train-link-immediately-after-enabling-training.patch
queue-4.14/arm64-dts-marvell-armada-37xx-declare-pcie-reset-pin.patch
queue-4.14/pci-aardvark-replace-custom-macros-by-standard-linux-pci_regs.h-macros.patch
queue-4.14/pci-aardvark-fix-a-leaked-reference-by-adding-missing-of_node_put.patch
queue-4.14/pci-aardvark-fix-pcie-max-payload-size-setting.patch
queue-4.14/pinctrl-armada-37xx-correct-pwm-pins-definitions.patch
queue-4.14/arm64-dts-marvell-armada-37xx-set-pcie_reset_pin-to-gpio-function.patch
queue-4.14/pci-aardvark-configure-pcie-resources-from-ranges-dt-property.patch
queue-4.14/pci-aardvark-improve-link-training.patch
queue-4.14/pci-aardvark-fix-link-training.patch
queue-4.14/pci-aardvark-fix-checking-for-link-up-via-ltssm-state.patch
queue-4.14/pci-aardvark-issue-perst-via-gpio.patch
queue-4.14/pinctrl-armada-37xx-correct-mpp-definitions.patch
queue-4.14/pci-add-pci_exp_lnkctl2_tls-macros.patch
queue-4.14/pci-aardvark-wait-for-endpoint-to-be-ready-before-training-link.patch
queue-4.14/pinctrl-armada-37xx-add-missing-pin-pcie1-wakeup.patch
queue-4.14/pci-aardvark-fix-compilation-on-s390.patch
queue-4.14/pci-aardvark-fix-i-o-space-page-leak.patch
queue-4.14/pci-aardvark-don-t-touch-pcie-registers-if-no-card-connected.patch
queue-4.14/pci-aardvark-remove-pcie-outbound-window-configuration.patch
queue-4.14/pci-aardvark-indicate-error-in-val-when-config-read-fails.patch
