Patch "iommu/rockchip: Fix PAGE_DESC_HI_MASKs for RK3568" has been added to the 5.15-stable tree

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This is a note to let you know that I've just added the patch titled

    iommu/rockchip: Fix PAGE_DESC_HI_MASKs for RK3568

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     iommu-rockchip-fix-page_desc_hi_masks-for-rk3568.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 5e789ed4bbb3bd860bca4a9a8db249ce67f9c63a
Author: Alex Bee <knaerzche@xxxxxxxxx>
Date:   Wed Nov 24 03:13:25 2021 +0100

    iommu/rockchip: Fix PAGE_DESC_HI_MASKs for RK3568
    
    [ Upstream commit f7ff3cff3527ff1e70cad8d2fe7c0c7b6f83120a ]
    
    With the submission of iommu driver for RK3568 a subtle bug was
    introduced: PAGE_DESC_HI_MASK1 and PAGE_DESC_HI_MASK2 have to be
    the other way arround - that leads to random errors, especially when
    addresses beyond 32 bit are used.
    
    Fix it.
    
    Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2")
    Signed-off-by: Alex Bee <knaerzche@xxxxxxxxx>
    Tested-by: Peter Geis <pgwipeout@xxxxxxxxx>
    Reviewed-by: Heiko Stuebner <heiko@xxxxxxxxx>
    Tested-by: Dan Johansen <strit@xxxxxxxxxxx>
    Reviewed-by: Benjamin Gaignard <benjamin.gaignard@xxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20211124021325.858139-1-knaerzche@xxxxxxxxx
    Signed-off-by: Joerg Roedel <jroedel@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 5cb260820eda6..7f23ad61c094f 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -200,8 +200,8 @@ static inline phys_addr_t rk_dte_pt_address(u32 dte)
 #define DTE_HI_MASK2	GENMASK(7, 4)
 #define DTE_HI_SHIFT1	24 /* shift bit 8 to bit 32 */
 #define DTE_HI_SHIFT2	32 /* shift bit 4 to bit 36 */
-#define PAGE_DESC_HI_MASK1	GENMASK_ULL(39, 36)
-#define PAGE_DESC_HI_MASK2	GENMASK_ULL(35, 32)
+#define PAGE_DESC_HI_MASK1	GENMASK_ULL(35, 32)
+#define PAGE_DESC_HI_MASK2	GENMASK_ULL(39, 36)
 
 static inline phys_addr_t rk_dte_pt_address_v2(u32 dte)
 {



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