Patch "powerpc/dcr: Use cmplwi instead of 3-argument cmpli" has been added to the 5.4-stable tree

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This is a note to let you know that I've just added the patch titled

    powerpc/dcr: Use cmplwi instead of 3-argument cmpli

to the 5.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     powerpc-dcr-use-cmplwi-instead-of-3-argument-cmpli.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 2f23d0ab070604623724bb5fd2a83f2aed46373d
Author: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
Date:   Thu Oct 14 13:44:24 2021 +1100

    powerpc/dcr: Use cmplwi instead of 3-argument cmpli
    
    [ Upstream commit fef071be57dc43679a32d5b0e6ee176d6f12e9f2 ]
    
    In dcr-low.S we use cmpli with three arguments, instead of four
    arguments as defined in the ISA:
    
            cmpli   cr0,r3,1024
    
    This appears to be a PPC440-ism, looking at the "PPC440x5 CPU Core
    User’s Manual" it shows cmpli having no L field, but implied to be 0 due
    to the core being 32-bit. It mentions that the ISA defines four
    arguments and recommends using cmplwi.
    
    It also corresponds to the old POWER instruction set, which had no L
    field there, a reserved bit instead.
    
    dcr-low.S is only built 32-bit, because it is only built when
    DCR_NATIVE=y, which is only selected by 40x and 44x. Looking at the
    generated code (with gcc/gas) we see cmplwi as expected.
    
    Although gas is happy with the 3-argument version when building for
    32-bit, the LLVM assembler is not and errors out with:
    
      arch/powerpc/sysdev/dcr-low.S:27:10: error: invalid operand for instruction
       cmpli 0,%r3,1024; ...
               ^
    
    Switch to the cmplwi extended opcode, which avoids any confusion when
    reading the ISA, fixes the issue with the LLVM assembler, and also means
    the code could be built 64-bit in future (though that's very unlikely).
    
    Reported-by: Nick Desaulniers <ndesaulniers@xxxxxxxxxx>
    Reviewed-by: Nick Desaulniers <ndesaulniers@xxxxxxxxxx>
    Signed-off-by: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
    BugLink: https://github.com/ClangBuiltLinux/linux/issues/1419
    Link: https://lore.kernel.org/r/20211014024424.528848-1-mpe@xxxxxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/powerpc/sysdev/dcr-low.S b/arch/powerpc/sysdev/dcr-low.S
index efeeb1b885a17..329b9c4ae5429 100644
--- a/arch/powerpc/sysdev/dcr-low.S
+++ b/arch/powerpc/sysdev/dcr-low.S
@@ -11,7 +11,7 @@
 #include <asm/export.h>
 
 #define DCR_ACCESS_PROLOG(table) \
-	cmpli	cr0,r3,1024;	 \
+	cmplwi	cr0,r3,1024;	 \
 	rlwinm  r3,r3,4,18,27;   \
 	lis     r5,table@h;      \
 	ori     r5,r5,table@l;   \



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