Patch "ASoC: cs42l42: Correct configuring of switch inversion from ts-inv" has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    ASoC: cs42l42: Correct configuring of switch inversion from ts-inv

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     asoc-cs42l42-correct-configuring-of-switch-inversion.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit a609d2137d1384926dd4afba1def8c28d436672f
Author: Richard Fitzgerald <rf@xxxxxxxxxxxxxxxxxxxxx>
Date:   Thu Oct 28 15:09:01 2021 +0100

    ASoC: cs42l42: Correct configuring of switch inversion from ts-inv
    
    [ Upstream commit 778a0cbef5fb76bf506f84938517bb77e7a1c478 ]
    
    The setting from the cirrus,ts-inv property should be applied to the
    TIP_SENSE_INV bit, as this is the one that actually affects the jack
    detect block. The TS_INV bit only swaps the meaning of the PLUG and
    UNPLUG interrupts and should always be 1 for the interrupts to have
    the normal meaning.
    
    Due to some misunderstanding the driver had been implemented to
    configure the TS_INV bit based on the jack switch polarity. This made
    the interrupts behave the correct way around, but left the jack detect
    block, button detect and analogue circuits always interpreting an open
    switch as unplugged.
    
    The signal chain inside the codec is:
    
    SENSE pin -> TIP_SENSE_INV -> TS_INV -> (invert) -> interrupts
                      |
                      v
                 Jack detect,
              button detect and
                analog control
    
    As the TIP_SENSE_INV already performs the necessary inversion the
    TS_INV bit never needs to change. It must always be 1 to yield the
    expected interrupt behaviour.
    
    Some extra confusion has arisen because of the additional invert in the
    interrupt path, meaning that a value applied to the TS_INV bit produces
    the opposite effect of applying it to the TIP_SENSE_INV bit. The ts-inv
    property has therefore always had the opposite effect to what might be
    expected (0 = inverted, 1 = not inverted). To maintain the meaning of
    the ts-inv property it must be inverted when applied to TIP_SENSE_INV.
    
    Signed-off-by: Richard Fitzgerald <rf@xxxxxxxxxxxxxxxxxxxxx>
    Fixes: 2c394ca79604 ("ASoC: Add support for CS42L42 codec")
    Link: https://lore.kernel.org/r/20211028140902.11786-3-rf@xxxxxxxxxxxxxxxxxxxxx
    Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index e56d3c9c39756..54c1ede59b8b7 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -1529,12 +1529,15 @@ static void cs42l42_setup_hs_type_detect(struct cs42l42_private *cs42l42)
 			(1 << CS42L42_HS_CLAMP_DISABLE_SHIFT));
 
 	/* Enable the tip sense circuit */
+	regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
+			   CS42L42_TS_INV_MASK, CS42L42_TS_INV_MASK);
+
 	regmap_update_bits(cs42l42->regmap, CS42L42_TIPSENSE_CTL,
 			CS42L42_TIP_SENSE_CTRL_MASK |
 			CS42L42_TIP_SENSE_INV_MASK |
 			CS42L42_TIP_SENSE_DEBOUNCE_MASK,
 			(3 << CS42L42_TIP_SENSE_CTRL_SHIFT) |
-			(0 << CS42L42_TIP_SENSE_INV_SHIFT) |
+			(!cs42l42->ts_inv << CS42L42_TIP_SENSE_INV_SHIFT) |
 			(2 << CS42L42_TIP_SENSE_DEBOUNCE_SHIFT));
 
 	/* Save the initial status of the tip sense */
@@ -1578,10 +1581,6 @@ static int cs42l42_handle_device_data(struct device *dev,
 		cs42l42->ts_inv = CS42L42_TS_INV_DIS;
 	}
 
-	regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
-			CS42L42_TS_INV_MASK,
-			(cs42l42->ts_inv << CS42L42_TS_INV_SHIFT));
-
 	ret = device_property_read_u32(dev, "cirrus,ts-dbnc-rise", &val);
 	if (!ret) {
 		switch (val) {



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