Patch "clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL" has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-at91-sam9x60-pll-use-div_round_closest_ull.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit fba5ddb2e07e6ca32732ab64c2c482ca2d724855
Author: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx>
Date:   Mon Oct 11 14:27:11 2021 +0300

    clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL
    
    [ Upstream commit f12d028b743bb6136da60b17228a1b6162886444 ]
    
    Use DIV_ROUND_CLOSEST_ULL() to avoid any inconsistency b/w the rate
    computed in sam9x60_frac_pll_recalc_rate() and the one computed in
    sam9x60_frac_pll_compute_mul_frac().
    
    Fixes: 43b1bb4a9b3e1 ("clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs")
    Signed-off-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20211011112719.3951784-8-claudiu.beznea@xxxxxxxxxxxxx
    Acked-by: Nicolas Ferre <nicolas.ferre@xxxxxxxxxxxxx>
    Signed-off-by: Stephen Boyd <sboyd@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c
index 78f458a7b2ef4..5a9daa3643a72 100644
--- a/drivers/clk/at91/clk-sam9x60-pll.c
+++ b/drivers/clk/at91/clk-sam9x60-pll.c
@@ -71,8 +71,8 @@ static unsigned long sam9x60_frac_pll_recalc_rate(struct clk_hw *hw,
 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);
 	struct sam9x60_frac *frac = to_sam9x60_frac(core);
 
-	return (parent_rate * (frac->mul + 1) +
-		((u64)parent_rate * frac->frac >> 22));
+	return parent_rate * (frac->mul + 1) +
+		DIV_ROUND_CLOSEST_ULL((u64)parent_rate * frac->frac, (1 << 22));
 }
 
 static int sam9x60_frac_pll_prepare(struct clk_hw *hw)



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