Patch "PCI: aardvark: Fix support for PCI_BRIDGE_CTL_BUS_RESET on emulated bridge" has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    PCI: aardvark: Fix support for PCI_BRIDGE_CTL_BUS_RESET on emulated bridge

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     pci-aardvark-fix-support-for-pci_bridge_ctl_bus_reset-on-emulated-bridge.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From bc4fac42e5f8460af09c0a7f2f1915be09e20c71 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@xxxxxxxxxx>
Date: Thu, 28 Oct 2021 20:56:58 +0200
Subject: PCI: aardvark: Fix support for PCI_BRIDGE_CTL_BUS_RESET on emulated bridge
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

From: Pali Rohár <pali@xxxxxxxxxx>

commit bc4fac42e5f8460af09c0a7f2f1915be09e20c71 upstream.

Aardvark supports PCIe Hot Reset via PCIE_CORE_CTRL1_REG.

Use it for implementing PCI_BRIDGE_CTL_BUS_RESET bit of PCI_BRIDGE_CONTROL
register on emulated bridge.

With this, the function pci_reset_secondary_bus() starts working and can
reset connected PCIe card. Custom userspace script [1] which uses setpci
can trigger PCIe Hot Reset and reset the card manually.

[1] https://alexforencich.com/wiki/en/pcie/hot-reset-linux

Link: https://lore.kernel.org/r/20211028185659.20329-7-kabel@xxxxxxxxxx
Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge config space")
Signed-off-by: Pali Rohár <pali@xxxxxxxxxx>
Signed-off-by: Marek Behún <kabel@xxxxxxxxxx>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 drivers/pci/controller/pci-aardvark.c |   27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -793,6 +793,22 @@ advk_pci_bridge_emul_base_conf_read(stru
 		*value = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);
 		return PCI_BRIDGE_EMUL_HANDLED;
 
+	case PCI_INTERRUPT_LINE: {
+		/*
+		 * From the whole 32bit register we support reading from HW only
+		 * one bit: PCI_BRIDGE_CTL_BUS_RESET.
+		 * Other bits are retrieved only from emulated config buffer.
+		 */
+		__le32 *cfgspace = (__le32 *)&bridge->conf;
+		u32 val = le32_to_cpu(cfgspace[PCI_INTERRUPT_LINE / 4]);
+		if (advk_readl(pcie, PCIE_CORE_CTRL1_REG) & HOT_RESET_GEN)
+			val |= PCI_BRIDGE_CTL_BUS_RESET << 16;
+		else
+			val &= ~(PCI_BRIDGE_CTL_BUS_RESET << 16);
+		*value = val;
+		return PCI_BRIDGE_EMUL_HANDLED;
+	}
+
 	default:
 		return PCI_BRIDGE_EMUL_NOT_HANDLED;
 	}
@@ -809,6 +825,17 @@ advk_pci_bridge_emul_base_conf_write(str
 		advk_writel(pcie, new, PCIE_CORE_CMD_STATUS_REG);
 		break;
 
+	case PCI_INTERRUPT_LINE:
+		if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) {
+			u32 val = advk_readl(pcie, PCIE_CORE_CTRL1_REG);
+			if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16))
+				val |= HOT_RESET_GEN;
+			else
+				val &= ~HOT_RESET_GEN;
+			advk_writel(pcie, val, PCIE_CORE_CTRL1_REG);
+		}
+		break;
+
 	default:
 		break;
 	}


Patches currently in stable-queue which might be from pali@xxxxxxxxxx are

queue-5.10/pci-aardvark-fix-reporting-data-link-layer-link-active.patch
queue-5.10/pci-aardvark-fix-configuring-reference-clock.patch
queue-5.10/pci-aardvark-fix-support-for-bus-mastering-and-pci_command-on-emulated-bridge.patch
queue-5.10/pci-mark-atheros-qca6174-to-avoid-bus-reset.patch
queue-5.10/serial-core-fix-initializing-and-restoring-termios-speed.patch
queue-5.10/pci-pci-bridge-emul-fix-emulation-of-w1c-bits.patch
queue-5.10/pci-aardvark-fix-support-for-pci_bridge_ctl_bus_reset-on-emulated-bridge.patch
queue-5.10/pci-aardvark-fix-checking-for-link-up-via-ltssm-state.patch
queue-5.10/pci-aardvark-fix-return-value-of-msi-domain-.alloc-method.patch
queue-5.10/pci-aardvark-read-all-16-bits-from-pcie_msi_payload_reg.patch
queue-5.10/pci-aardvark-do-not-unmask-unused-interrupts.patch
queue-5.10/pci-aardvark-do-not-clear-status-bits-of-masked-interrupts.patch
queue-5.10/pci-aardvark-set-pci-bridge-class-code-to-pci-bridge.patch
queue-5.10/pci-aardvark-fix-support-for-pci_rom_address1-on-emulated-bridge.patch



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