This is a note to let you know that I've just added the patch titled clocksource/arm_arch_timer: Improve Allwinner A64 timer workaround to the 5.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: clocksource-arm_arch_timer-improve-allwinner-a64-timer-workaround.patch and it can be found in the queue-5.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From 8b33dfe0ba1c84c1aab2456590b38195837f1e6e Mon Sep 17 00:00:00 2001 From: Samuel Holland <samuel@xxxxxxxxxxxx> Date: Fri, 14 May 2021 21:14:39 -0500 Subject: clocksource/arm_arch_timer: Improve Allwinner A64 timer workaround From: Samuel Holland <samuel@xxxxxxxxxxxx> commit 8b33dfe0ba1c84c1aab2456590b38195837f1e6e upstream. Bad counter reads are experienced sometimes when bit 10 or greater rolls over. Originally, testing showed that at least 10 lower bits would be set to the same value during these bad reads. However, some users still reported time skips. Wider testing revealed that on some chips, occasionally only the lowest 9 bits would read as the anomalous value. During these reads (which still happen only when bit 10), bit 9 would read as the correct value. Reduce the mask by one bit to cover these cases as well. Cc: stable@xxxxxxxxxxxxxxx Fixes: c950ca8c35ee ("clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer instability") Reported-by: Roman Stratiienko <r.stratiienko@xxxxxxxxx> Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> Signed-off-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> Link: https://lore.kernel.org/r/20210515021439.55316-1-samuel@xxxxxxxxxxxx Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- drivers/clocksource/arm_arch_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -348,7 +348,7 @@ static u64 notrace arm64_858921_read_cnt do { \ _val = read_sysreg(reg); \ _retries--; \ - } while (((_val + 1) & GENMASK(9, 0)) <= 1 && _retries); \ + } while (((_val + 1) & GENMASK(8, 0)) <= 1 && _retries); \ \ WARN_ON_ONCE(!_retries); \ _val; \ Patches currently in stable-queue which might be from samuel@xxxxxxxxxxxx are queue-5.4/clocksource-arm_arch_timer-improve-allwinner-a64-timer-workaround.patch