This is a note to let you know that I've just added the patch titled
ARM: 9027/1: head.S: explicitly map DT even if it lives in the first physical section
to the 5.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-9027-1-head.s-explicitly-map-dt-even-if-it-lives-in-the-first-physical-section.patch
and it can be found in the queue-5.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From foo@baz Mon May 17 01:36:09 PM CEST 2021
From: Florian Fainelli <f.fainelli@xxxxxxxxx>
Date: Mon, 10 May 2021 06:33:21 -0700
Subject: ARM: 9027/1: head.S: explicitly map DT even if it lives in the first physical section
To: stable@xxxxxxxxxxxxxxx
Cc: Ard Biesheuvel <ardb@xxxxxxxxxx>, "kernelci.org bot" <bot@xxxxxxxxxxxx>, Linus Walleij <linus.walleij@xxxxxxxxxx>, Russell King <rmk+kernel@xxxxxxxxxxxxxxx>, Florian Fainelli <f.fainelli@xxxxxxxxx>, Jonathan Corbet <corbet@xxxxxxx>, Russell King <linux@xxxxxxxxxxxxxxx>, Nicolas Pitre <nico@xxxxxxxxxxx>, Sasha Levin <sashal@xxxxxxxxxx>, linux-doc@xxxxxxxxxxxxxxx (open list:DOCUMENTATION), linux-kernel@xxxxxxxxxxxxxxx (open list), linux-arm-kernel@xxxxxxxxxxxxxxxxxxx (moderated list:ARM PORT), Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
Message-ID: <20210510133321.1790243-5-f.fainelli@xxxxxxxxx>
From: Ard Biesheuvel <ardb@xxxxxxxxxx>
commit 10fce53c0ef8f6e79115c3d9e0d7ea1338c3fa37 upstream
The early ATAGS/DT mapping code uses SECTION_SHIFT to mask low order
bits of R2, and decides that no ATAGS/DTB were provided if the resulting
value is 0x0.
This means that on systems where DRAM starts at 0x0 (such as Raspberry
Pi), no explicit mapping of the DT will be created if R2 points into the
first 1 MB section of memory. This was not a problem before, because the
decompressed kernel is loaded at the base of DRAM and mapped using
sections as well, and so as long as the DT is referenced via a virtual
address that uses the same translation (the linear map, in this case),
things work fine.
However, commit 7a1be318f579 ("9012/1: move device tree mapping out of
linear region") changes this, and now the DT is referenced via a virtual
address that is disjoint from the linear mapping of DRAM, and so we need
the early code to create the DT mapping unconditionally.
So let's create the early DT mapping for any value of R2 != 0x0.
Reported-by: "kernelci.org bot" <bot@xxxxxxxxxxxx>
Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
Signed-off-by: Ard Biesheuvel <ardb@xxxxxxxxxx>
Signed-off-by: Russell King <rmk+kernel@xxxxxxxxxxxxxxx>
Signed-off-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm/kernel/head.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -274,10 +274,10 @@ __create_page_tables:
* We map 2 sections in case the ATAGs/DTB crosses a section boundary.
*/
mov r0, r2, lsr #SECTION_SHIFT
- movs r0, r0, lsl #SECTION_SHIFT
+ cmp r2, #0
ldrne r3, =FDT_FIXED_BASE >> (SECTION_SHIFT - PMD_ORDER)
addne r3, r3, r4
- orrne r6, r7, r0
+ orrne r6, r7, r0, lsl #SECTION_SHIFT
strne r6, [r3], #1 << PMD_ORDER
addne r6, r6, #1 << SECTION_SHIFT
strne r6, [r3]
Patches currently in stable-queue which might be from f.fainelli@xxxxxxxxx are
queue-5.4/arm-9020-1-mm-use-correct-section-size-macro-to-describe-the-fdt-virtual-address.patch
queue-5.4/arm-9011-1-centralize-phys-to-virt-conversion-of-dt-atags-address.patch
queue-5.4/arm-9027-1-head.s-explicitly-map-dt-even-if-it-lives-in-the-first-physical-section.patch
queue-5.4/arm-9012-1-move-device-tree-mapping-out-of-linear-region.patch
